From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
To: linuxppc-dev@ozlabs.org
Cc: Ingo Molnar <mingo@elte.hu>, Daniel Walker <dwalker@mvista.com>,
linux-kernel@vger.kernel.org, tglx@linutronix.de,
mgreer@mvista.com
Subject: Re: [PATCH -rt] powerpc update
Date: Sat, 28 Oct 2006 19:33:42 +0400 [thread overview]
Message-ID: <45437856.5060509@ru.mvista.com> (raw)
In-Reply-To: <454371AC.4030902@ru.mvista.com>
Hello, I wrote:
> 3. Do the same as x86 APIC driver does and use level/egde flows instead
> of fasteoi for the case when IRQs are threaded -- that ensues doing (2)
> as well.
Note that OpenPIC (as far as I could understand its h/w) is essentially
the same as IOAPIC/LAPIC couple on x86, i.e. a level-triggered IRQ remains
effectively globally masked until CPU writes to its local EOI reg. However,
the repetitive edge-triggered IRQ from the same line may still be detected
while being serviced on a CPU (hm, the questions is, can it be sent to any
other CPU in system while being handled on a certain CPU?)...
I hope somebody corrects me if I'm wrong about both x86 and PPC. :-)
>> Ingo
WBR, Sergei
prev parent reply other threads:[~2006-10-28 15:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-10-03 15:53 [PATCH -rt] powerpc update Daniel Walker
2006-10-18 7:28 ` Ingo Molnar
2006-10-18 7:32 ` Ingo Molnar
2006-10-18 14:32 ` Daniel Walker
2006-10-18 14:32 ` Ingo Molnar
2006-10-18 14:33 ` Ingo Molnar
2006-10-18 14:52 ` Daniel Walker
2006-10-18 20:54 ` Daniel Walker
2006-10-28 15:05 ` Sergei Shtylyov
2006-10-28 15:33 ` Sergei Shtylyov [this message]
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