From: Ian Molton <spyro@f2s.com>
To: Ian Molton <spyro@f2s.com>, linux-kernel@vger.kernel.org
Subject: Re: [Kernel-discuss] RFC - platform device, IRQs and SoC devices
Date: Sat, 25 Nov 2006 12:51:17 +0000 [thread overview]
Message-ID: <45683C45.8020904@f2s.com> (raw)
In-Reply-To: <20061125122910.GA12104@flint.arm.linux.org.uk>
Russell King wrote:
>
> It's quite possible to have:
>
> IRQ chip
> 0 irqchip_0
> 1 irqchip_0
> 2 irqchip_1
> 3 irqchip_0
> 4 irqchip_0
> 5 irqchip_1
> 6 irqchip_2
> 7 irqchip_2
> 8 irqchip_2
> 9 irqchip_1
>
> Where do you start '0' for each irqchip? How do you split the irq_desc
> array between the irqchips?
I see no reason why this couldnt continue to work 'as is' with the new
behaviour only applying to irqchips with their own non-NULL irq_desc array.
The other problem is integration with /proc, specifically the irq usage
counter.
The irq numbers in /proc wouldnt have to be 'real' they can be
synthesized from a base starting after the main system IRQs.
Im not sure how fixed the format of /proc/interrupts is, wether the IRQ
numbers are required to be sequential or not (some arent even numbers
like NMI on x86). if they dont have to be sequential then its simply a
matter of keeping a counter starting from BOARD_IRQ_END+1 and for each
IRQchip adding its individual irq numbers to it as they are displayed,
then incrementing the counter by the size of the irqdesc array for that
chip.
next prev parent reply other threads:[~2006-11-25 12:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-21 16:07 RFC - platform device, IRQs and SoC devices Ian Molton
2006-11-25 11:37 ` [Kernel-discuss] " Ian Molton
2006-11-25 12:29 ` Russell King
2006-11-25 12:51 ` Ian Molton [this message]
2006-11-25 13:02 ` Russell King
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