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From: "H. Peter Anvin" <hpa@zytor.com>
To: Andreas Block <andreas.block@esd-electronics.com>
Cc: Xavier Bestel <xavier.bestel@free.fr>, linux-kernel@vger.kernel.org
Subject: Re: Bugfixes: PCI devices get assigned redundant IRQs
Date: Sun, 28 Jan 2007 00:04:41 -0800	[thread overview]
Message-ID: <45BC5919.8030004@zytor.com> (raw)
In-Reply-To: <op.tmrh5hxp8n9ctc@pc-block.esd>

Andreas Block wrote:
>>
>> Aren't there platforms for which irq = 0 is a valid irq ?
> 
> As far as I understand the PCI spec, the answer to your question seems 
> to be: no
> (or I'm missing something).
> 
> Don't get me wrong. I'm not talking about system IRQs, but about the 
> value of the Interrupt Pin Register in PCI configuration space.
> 
> The PCI Local Bus Specification in Revision 3.0 from 3rd February 2004 
> says on page 223 about the content of Interrupt Pin register:
> 
> Value 0x00: _No_ interrupt
> Values 0x01 to 0x04: Interrupt lines A to D
> And values 5 to 0xFF are reserved.
> 
> So I'd say, the "correction" of greater values than four to a value of 
> one seems discussable, too. Because it will break any future changes of 
> the PCI spec.
> 

I think you're confusing the Interrupt Line register and the Interrupt 
Pin register.  The Interrupt Line register is platform-dependent, but on 
x86 platforms it generally contains the IRQ number (and IRQ 0 is valid, 
although in practice it is never used since IRQ 0 is the system timer 
and is never connected to the PCI bus), or 255 meaning "none" -- see the 
footnote on page 223 of the PCI 3.0 spec.

	-hpa

  reply	other threads:[~2007-01-28  8:04 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-01-26 10:50 Bugfixes: PCI devices get assigned redundant IRQs Andreas Block
2007-01-26 11:00 ` Xavier Bestel
2007-01-26 12:54   ` Andreas Block
2007-01-28  8:04     ` H. Peter Anvin [this message]
2007-01-28 15:35       ` Andreas Block

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