Re: PIO port width on various archs?

[Brian Johnson <bjj4@charter.net>]

Avi Kivity wrote:
> Hollis Blanchard wrote:
>> On Sun, 2007-02-25 at 10:58 +0200, Avi Kivity wrote:
>>   
>>> I'm changing the kvm userspace interface to be more friendly to other 
>>> archs.  One issue is the PIO port size.  x86 uses 16 bits to hold the 
>>> port size (64K ports).  Is that an issue for other archs?
>>>
>>> I guess I could change it to __u32, but it's better to know what various 
>>> architectures actually require.
>>>     
>> PowerPC doesn't have any such concept; access to ISA PIO is done by
>> having the bridge translate a particular range of MMIO accesses as PIO.
>> I'm no expert, but I don't know of any mainstream processor other than
>> x86 that supports PIO.
>>   
> 
> I think ia64 does, but it's probably exactly the same as x86.

IA64 uses a special memory range which is translated into I/O port 
accesses by the CPU hardware (as opposed to the I/O bridge.)  Section 
10.7 of volume 2 of the Itanium SDM has the details.  Only 64k of I/O 
ports is supported.

Brian J. Johnson