* INIT IPI help
@ 2007-03-06 16:00 Jonathan M. McCune
0 siblings, 0 replies; only message in thread
From: Jonathan M. McCune @ 2007-03-06 16:00 UTC (permalink / raw)
To: linux-kernel
Hello,
I have Linux kernel 2.6.20-rc5 running on an AMD64 CPU, although I'm
running an i386 (not amd64) kernel. I need to send an INIT
inter-processor-interrupt from the BSP to all APs (there is one AP in my
case since my system has a dual-core CPU). After using CPU-hotplug to
disable CPU1, I am using this code to [hopefully] send an IPI:
apic_write(APIC_ICR, APIC_DEST_ALLBUT | APIC_INT_ASSERT | APIC_DM_INIT);
while(apic_read(APIC_ICR) & APIC_ICR_BUSY) {
mdelay(1);
}
My motivation for doing this is in preparation for executing an SKINIT
instruction, which requires all APs to be in the INIT state so that a
copy of the up-to-64KB Secure Loader Block (SLB) provided as an argument
to SKINIT can be successfully transmitted to the system's TPM where it
is hashed. No hash value is being computed, which is my problem.
Now, SKINIT is a complex instruction with multiple opportunities to
fail, and my motivation for writing this email is only to get a sense of
whether my code above is the right way to send an INIT IPI to the AP.
After executing the code above, can I be confident that the AP is in the
INIT state?
Thanks,
-Jon
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2007-03-06 16:29 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-03-06 16:00 INIT IPI help Jonathan M. McCune
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox