From: Bharata B Rao <bharata@amd.com>
To: "Naveen N Rao (AMD)" <naveen@kernel.org>, <x86@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Nikunj A Dadhania <nikunj@amd.com>,
Manali Shukla <manali.shukla@amd.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 0/3] Support additional AMD EILVT registers
Date: Wed, 13 May 2026 11:33:57 +0530 [thread overview]
Message-ID: <45edb70d-3ee8-43fc-b20a-b6e144e958fa@amd.com> (raw)
In-Reply-To: <cover.1778594390.git.naveen@kernel.org>
On 12-May-26 7:49 PM, Naveen N Rao (AMD) wrote:
> This is v2 of the series posted at:
> http://lore.kernel.org/r/cover.1775019269.git.naveen@kernel.org
>
> Changes since v1:
> - Drop the first two patches that were merged
> - Call init_eilvt() from apic_bsp_setup(), rather than
> setup_local_APIC() so as not to call an __init function from a
> non-init function. (Kernel 0-day bot)
> - Initialize eilvt count to APIC_EILVT_NR_AMD_10H and allocate
> eilvt_offsets array only on AMD processors.
>
> Manali,
> I am retaining your Tested-by: tag since the changes are minimal, but
> please reply here if you have concerns with the changes.
>
> --
> Future AMD processors will be increasing the number of APIC EILVT
> registers (*). This series adds support for the same along with some
> related cleanups.
>
> (*) https://docs.amd.com/v/u/en-US/69205_1.00_AMD64_IBS_PUB)
This patchset is required to support IBS Memory Profiler feature too. This
patchset got tested with pghot+IBS Memory profiler -
https://lore.kernel.org/linux-mm/20260504060924.344313-8-bharata@amd.com/
Regards,
Bharata.
prev parent reply other threads:[~2026-05-13 6:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-12 14:19 [PATCH v2 0/3] Support additional AMD EILVT registers Naveen N Rao (AMD)
2026-05-12 14:19 ` [PATCH v2 1/3] perf/amd/ibs: Limit the max EILVT register count for AMD family 0x10 Naveen N Rao (AMD)
2026-05-12 14:19 ` [PATCH v2 2/3] x86/apic: Introduce a variable to track the number of EILVT registers Naveen N Rao (AMD)
2026-05-12 14:19 ` [PATCH v2 3/3] x86/apic: Drop APIC_EILVT_NR_MAX and switch to using apic_eilvt_count Naveen N Rao (AMD)
2026-05-13 6:03 ` Bharata B Rao [this message]
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