From: "Joachim Deguara" <joachim.deguara@amd.com>
To: discuss@x86-64.org, "Langsdorf, Mark" <mark.langsdorf@amd.com>,
linux-kernel@vger.kernel.org, "Nagendra,
Bhavana" <bhavana.nagendra@amd.com>
Subject: [PATCH] i386 mce check capability
Date: Tue, 03 Apr 2007 14:49:42 +0200 [thread overview]
Message-ID: <46124D66.7030309@amd.com> (raw)
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Currently the i386 architecture checks the family for mce capability and this removes that and uses the CPUID information. Tested on a K8 revE and a family10h processor.
-Joachim
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This eliminates checking of a set AMD procesor family if mce is
allowed and relies on the information being in CPUID.
Signed-off-by: Joachim Deguara <joachim.deguara@amd.com>
Index: 2.6-linus-git/arch/i386/kernel/cpu/mcheck/mce.c
===================================================================
--- 2.6-linus-git.orig/arch/i386/kernel/cpu/mcheck/mce.c
+++ 2.6-linus-git/arch/i386/kernel/cpu/mcheck/mce.c
@@ -38,8 +38,7 @@ void mcheck_init(struct cpuinfo_x86 *c)
switch (c->x86_vendor) {
case X86_VENDOR_AMD:
- if (c->x86==6 || c->x86==15)
- amd_mcheck_init(c);
+ amd_mcheck_init(c);
break;
case X86_VENDOR_INTEL:
Index: 2.6-linus-git/arch/i386/kernel/cpu/mcheck/k7.c
===================================================================
--- 2.6-linus-git.orig/arch/i386/kernel/cpu/mcheck/k7.c
+++ 2.6-linus-git/arch/i386/kernel/cpu/mcheck/k7.c
@@ -75,6 +75,9 @@ void amd_mcheck_init(struct cpuinfo_x86
machine_check_vector = k7_machine_check;
wmb();
+ if (!cpu_has(c, X86_FEATURE_MCE))
+ return;
+
printk (KERN_INFO "Intel machine check architecture supported.\n");
rdmsr (MSR_IA32_MCG_CAP, l, h);
if (l & (1<<8)) /* Control register present ? */
reply other threads:[~2007-04-03 12:50 UTC|newest]
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