Re: IRQ splitting

Re: IRQ splitting

[Robert Hancock]

Jan Engelhardt wrote:
> Hello list,
> 
> 
> 
> let's take the following /proc/interrupts dump (CPU2,CPU3 trimmed)...
> 
>            CPU0       CPU1
>   0:   37041766   37038991  IO-APIC-edge  timer
>   1:         10          2  IO-APIC-edge  i8042
>   8:          0          0  IO-APIC-edge  rtc
>   9:          0          0  IO-APIC-level  acpi
>  12:        114          0  IO-APIC-edge  i8042
>  14:      25219    5800049  IO-APIC-edge  ide0
> 201:     260381     238454  IO-APIC-level  aacraid
> 209:          0          0  IO-APIC-level  ohci_hcd:usb1
> 217:          0          0  IO-APIC-level  ehci_hcd:usb2
> 225:   57531742          0  IO-APIC-level  eth0,radeon@pci:0000:03:00.0
> 233:         26          0  IO-APIC-level  eth1
> NMI:       1661       1397
> LOC:  147579966  147579949
> ERR:          0
> MIS:          0
> 
> My question is whether it is possible that eth0's interrupts go to CPU0
> and radeon's to CPU1, and if so, how I would enable that. Alternatively,
> is it possible to just move eth0 or radeon to a different interrupt?

Generally (at least in APIC mode) the IRQ assignments are based on 
hard-wired interrupt lines on the board. In this case, the slots that 
the Radeon and eth0 card are in likely share a physical interrupt line 
and there is no way to separate them in software. You can try moving the 
  card(s) to different slots..

-- 
Robert Hancock      Saskatoon, SK, Canada
To email, remove "nospam" from hancockr@nospamshaw.ca
Home Page: http://www.roberthancock.com/

Re: IRQ splitting

[Stephen Hemminger]

On Thu, 05 Apr 2007 08:34:59 -0600
Robert Hancock <hancockr@shaw.ca> wrote:

> Jan Engelhardt wrote:
> > Hello list,
> > 
> > 
> > 
> > let's take the following /proc/interrupts dump (CPU2,CPU3 trimmed)...
> > 
> >            CPU0       CPU1
> >   0:   37041766   37038991  IO-APIC-edge  timer
> >   1:         10          2  IO-APIC-edge  i8042
> >   8:          0          0  IO-APIC-edge  rtc
> >   9:          0          0  IO-APIC-level  acpi
> >  12:        114          0  IO-APIC-edge  i8042
> >  14:      25219    5800049  IO-APIC-edge  ide0
> > 201:     260381     238454  IO-APIC-level  aacraid
> > 209:          0          0  IO-APIC-level  ohci_hcd:usb1
> > 217:          0          0  IO-APIC-level  ehci_hcd:usb2
> > 225:   57531742          0  IO-APIC-level  eth0,radeon@pci:0000:03:00.0
> > 233:         26          0  IO-APIC-level  eth1
> > NMI:       1661       1397
> > LOC:  147579966  147579949
> > ERR:          0
> > MIS:          0
> > 
> > My question is whether it is possible that eth0's interrupts go to CPU0
> > and radeon's to CPU1, and if so, how I would enable that. Alternatively,
> > is it possible to just move eth0 or radeon to a different interrupt?
> 
> Generally (at least in APIC mode) the IRQ assignments are based on 
> hard-wired interrupt lines on the board. In this case, the slots that 
> the Radeon and eth0 card are in likely share a physical interrupt line 
> and there is no way to separate them in software. You can try moving the 
>   card(s) to different slots..
> 

If the radeon and/or the Ethernet driver support MSI, that would split
out the IRQ's as well.

-- 
Stephen Hemminger <shemminger@linux-foundation.org>

Re: IRQ splitting

[Jan Engelhardt]

Hello Stephen,

On Apr 5 2007 12:23, Stephen Hemminger wrote:
>
>If the radeon and/or the Ethernet driver support MSI, that would split
>out the IRQ's as well.

Would Linux do that automatically? How to find out whether a given
device -- or device driver? -- supports MSI?


Thanks,
Jan
-- 

Re: IRQ splitting

[Stephen Hemminger]

On Thu, 5 Apr 2007 22:37:45 +0200 (MEST)
Jan Engelhardt <jengelh@linux01.gwdg.de> wrote:

> Hello Stephen,
> 
> On Apr 5 2007 12:23, Stephen Hemminger wrote:
> >
> >If the radeon and/or the Ethernet driver support MSI, that would split
> >out the IRQ's as well.
> 
> Would Linux do that automatically? How to find out whether a given
> device -- or device driver? -- supports MSI?
> 
> 
> Thanks,
> Jan

lspci -vv will show if hardware is capable. The device driver needs
to have code that does the necessary MSI setup, some have it but
many don't. MSI is also broken on some chipsets (mostly AMD).

IRQ splitting

[Jan Engelhardt]

Hello list,



let's take the following /proc/interrupts dump (CPU2,CPU3 trimmed)...

           CPU0       CPU1
  0:   37041766   37038991  IO-APIC-edge  timer
  1:         10          2  IO-APIC-edge  i8042
  8:          0          0  IO-APIC-edge  rtc
  9:          0          0  IO-APIC-level  acpi
 12:        114          0  IO-APIC-edge  i8042
 14:      25219    5800049  IO-APIC-edge  ide0
201:     260381     238454  IO-APIC-level  aacraid
209:          0          0  IO-APIC-level  ohci_hcd:usb1
217:          0          0  IO-APIC-level  ehci_hcd:usb2
225:   57531742          0  IO-APIC-level  eth0,radeon@pci:0000:03:00.0
233:         26          0  IO-APIC-level  eth1
NMI:       1661       1397
LOC:  147579966  147579949
ERR:          0
MIS:          0

My question is whether it is possible that eth0's interrupts go to CPU0
and radeon's to CPU1, and if so, how I would enable that. Alternatively,
is it possible to just move eth0 or radeon to a different interrupt?



Jan
-- 

Re: IRQ splitting

[Jiri Kosina]

On Thu, 5 Apr 2007, Jan Engelhardt wrote:

> My question is whether it is possible that eth0's interrupts go to CPU0 

Documentation/IRQ-affinity.txt

-- 
Jiri Kosina

Re: IRQ splitting

[Mark Hounschell]

Jiri Kosina wrote:
> On Thu, 5 Apr 2007, Jan Engelhardt wrote:
> 
>> My question is whether it is possible that eth0's interrupts go to CPU0 
> 
> Documentation/IRQ-affinity.txt
> 

There is nothing in there tells ya how to get them off the same IRQ.
That has to be done first usually be moving one of them to another
slot/bus. Then Documentation/IRQ-affinity.txt can be referenced.

Somehow I think Jan already knew that and really wants to know
how to keep them from sharing the same irq without having to
change slot assignments. I know I would.

Mark

Re: IRQ splitting

[Lennart Sorensen]

On Thu, Apr 05, 2007 at 12:40:57PM +0200, Jan Engelhardt wrote:
> let's take the following /proc/interrupts dump (CPU2,CPU3 trimmed)...
> 
>            CPU0       CPU1
>   0:   37041766   37038991  IO-APIC-edge  timer
>   1:         10          2  IO-APIC-edge  i8042
>   8:          0          0  IO-APIC-edge  rtc
>   9:          0          0  IO-APIC-level  acpi
>  12:        114          0  IO-APIC-edge  i8042
>  14:      25219    5800049  IO-APIC-edge  ide0
> 201:     260381     238454  IO-APIC-level  aacraid
> 209:          0          0  IO-APIC-level  ohci_hcd:usb1
> 217:          0          0  IO-APIC-level  ehci_hcd:usb2
> 225:   57531742          0  IO-APIC-level  eth0,radeon@pci:0000:03:00.0
> 233:         26          0  IO-APIC-level  eth1
> NMI:       1661       1397
> LOC:  147579966  147579949
> ERR:          0
> MIS:          0
> 
> My question is whether it is possible that eth0's interrupts go to CPU0
> and radeon's to CPU1, and if so, how I would enable that. Alternatively,
> is it possible to just move eth0 or radeon to a different interrupt?

Check the motherboard manual.  Sometimes they explictly list which slots
share IRQs (And by share I mean are physically tied to the same wire).
I know many Asus boards have that information in the manual.

So in many cases other than changing slots, there is nothing you can do
to change the IRQ sharing, since the slots are physically sharing the
interrupt.

--
Len Sorensen