From: "H. Peter Anvin" <hpa@zytor.com>
To: Ulrich Drepper <drepper@redhat.com>
Cc: Andi Kleen <ak@suse.de>,
Linux Kernel <linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>
Subject: Re: Why ssse3?
Date: Wed, 02 May 2007 19:28:40 -0700 [thread overview]
Message-ID: <463948D8.4000303@zytor.com> (raw)
In-Reply-To: <4639171A.3050004@redhat.com>
Ulrich Drepper wrote:
> Andi Kleen wrote:
>> Nope. SSE3 != SSSE3. The additional S means Supplemential.
>>
>> It's probably because the few changes didn't justify a SSE4
>
> OK, the problem is that the actual sse3 bit is misnamed. According to
> Intel's docs bit 0 of ECX is "sse", the kernel uses "pni". Too bad.
Intel has a nasty habit of renaming things after they are already
deployed in Linux.
-hpa
next prev parent reply other threads:[~2007-05-03 2:28 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-05-02 22:41 Why ssse3? Ulrich Drepper
2007-05-02 22:46 ` Andi Kleen
2007-05-02 22:56 ` Ulrich Drepper
2007-05-03 2:28 ` H. Peter Anvin [this message]
2007-05-03 8:52 ` Andi Kleen
2007-05-03 9:02 ` Avi Kivity
2007-05-03 9:07 ` Andi Kleen
2007-05-03 16:03 ` Roland Dreier
2007-05-02 22:47 ` Ismail Dönmez
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