Re: [PATCH 0/2] PCI-X/PCI-Express read control interfaces

["Kok, Auke" <auke-jan.h.kok@intel.com>]

Andrew Morton wrote:
> On Tue, 15 May 2007 13:50:27 +0200
> "Peter Oruba" <peter.oruba@amd.com> wrote:
> 
>> This patch set introduces a PCI-X / PCI-Express read byte count control 
>> interface. Instead of letting every driver to directly read/write to PCI 
>> config space for that, an interface is provided. The interface functions then 
>> can be used for quirks since some PCI bridges require that read byte count 
>> values are set by the BIOS and left unchanged by device drivers.
> 
> Some of the patches were wordwrapped, which I fixed.
> 
> The way we would merge a feature like this is
> 
> - get maintainers to review-and-ack the change
> 
> - merge the core patch into Greg's PCI tree and later into
>   mainline.
> 
> - Once the base infrastructure is in mainline, feed the per-driver
>   changes into the tree via the appropriate maintainers.
> 
> This takes, umm, months and consumes quite a bit of my time.  I'm becoming
> inclined just to slam stuff like this straight in as you've proposed, but
> for now, let's play the game - I split the patches up appropriately.  I
> don't think there's any particular urgency behind this, is there?

While Jeff just Acked the changes to e1000-specific for me, I think this is a 
good approach and would appreciate it. I'll be happy to pull the change and push 
it through in due time.

Auke