From: Manu Abraham <abraham.manu@gmail.com>
To: Roland Dreier <rdreier@cisco.com>
Cc: Greg KH <greg@kroah.com>,
linux-pci@atrey.karlin.mff.cuni.cz,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: PCIE
Date: Thu, 24 May 2007 04:07:31 +0400 [thread overview]
Message-ID: <4654D743.10907@gmail.com> (raw)
In-Reply-To: <adatzu385g1.fsf@cisco.com>
Roland Dreier wrote:
> > It looks so, from the logs. The only problem is i can't disable the
> > interrupts, if i write "0" to 0x500, the interrupt/enable register, it
> > gives me a solid freeze. If i read from the handler, commenting out the
> > disable interrupts in init, that read also gives me a solid freeze. This
> > lead me to think that there could be some problem with the MMIO block
> > access.
>
> OK, this looks reasonable:
>
> > #define saa716x_write(dat, addr) writel((dat), (saa716x->mmio)+(addr))
>
> although
>
> a) your driver has no hope of working on a system with more than one
> device of this type; and
to make it working with more than one device shouldn't be hard once it
is going on.
> b) there's really no point in obfuscating a simple use of writel()
> this way.
>
> Why does the device come up in a state where it generates a stream of
> interrupts as soon as you enable the PCI device? That's somewhat
> unusual behavior, although certainly not unheard of.
Will ask the vendor, what's going on.
> This really has the feel of a typical driver bug to me, not anything
> related to general PCIe access. I've definitely wedged my system many
> times while trying to poke a device the right way.
Yeah, you seem to sound right.
> Also, where are you getting the offset of 0x500 from?
The register offset is according to the device specs. Of course i
already found some wrong offsets etc, maybe this one's wrong too, probably.
> Is it possible
> that the offset is really being given to you in bits (so you should
> use 0x500 / 8) or 32-bit words (so you should use an offset of 0x500 *
It says, the base address is currently 500h
> 4)? Are the datasheet / programming docs available for this device?
Working with this device, under NDA with the vendor.
> I actually have:
>
> 02:00.0 Multimedia controller: Philips Semiconductors Unknown device 7162
>
> in one of my systems so I'd be somewhat interested in getting a driver
> working too.
Cool, won't be that long, just the bridge part remains, most other parts
are done or do exist.
Thanks,
Manu
next prev parent reply other threads:[~2007-05-24 0:07 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-05-23 12:15 PCIE Manu Abraham
2007-05-23 15:59 ` PCIE Greg KH
2007-05-23 20:59 ` PCIE Manu Abraham
2007-05-23 21:10 ` PCIE Roland Dreier
2007-05-23 22:11 ` PCIE Manu Abraham
2007-05-23 22:23 ` PCIE Roland Dreier
2007-05-23 23:03 ` PCIE Manu Abraham
2007-05-23 23:51 ` PCIE Roland Dreier
2007-05-24 0:07 ` Manu Abraham [this message]
2007-05-24 22:32 ` PCIE Manu Abraham
2007-05-25 3:25 ` PCIE Roland Dreier
2007-05-26 15:03 ` PCIE Manu Abraham
2007-05-26 18:28 ` PCIE Grant Grundler
2007-05-26 19:27 ` PCIE Manu Abraham
2007-05-28 1:15 ` PCIE Roland Dreier
2007-05-28 1:25 ` PCIE Manu Abraham
2007-05-28 2:04 ` PCIE Manu Abraham
2007-05-28 2:24 ` PCIE Roland Dreier
2007-05-28 2:47 ` PCIE Manu Abraham
2007-05-26 22:49 ` PCIE David Miller
2007-05-26 22:57 ` PCIE Manu Abraham
2007-05-26 23:55 ` PCIE Grant Grundler
2007-05-27 0:00 ` PCIE David Miller
2007-05-27 0:16 ` PCIE Grant Grundler
2007-05-27 0:30 ` PCIE David Miller
2007-05-27 1:01 ` PCIE Manu Abraham
2007-05-27 1:49 ` PCIE Grant Grundler
2007-05-27 20:28 ` PCIE Manu Abraham
2007-05-28 1:10 ` PCIE Roland Dreier
2007-05-27 2:34 ` PCIE H. Peter Anvin
2007-05-27 7:40 ` PCIE David Miller
2007-05-27 20:31 ` PCIE Manu Abraham
2007-05-28 1:05 ` PCIE Roland Dreier
2007-05-28 1:03 ` PCIE Roland Dreier
2007-05-28 2:54 ` PCIE David Miller
2007-05-28 4:18 ` PCIE Grant Grundler
2007-05-28 5:23 ` PCIE H. Peter Anvin
2007-05-28 5:22 ` PCIE H. Peter Anvin
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