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From: Kevin Hilman <khilman@mvista.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>,
	linux-kernel@vger.kernel.org, rmk@arm.linux.org.uk
Subject: Re: [PATCH -rt] ARM TLB flush fix: don't forget to re-enable	preemption
Date: Wed, 23 May 2007 17:41:55 -0700	[thread overview]
Message-ID: <4654DF53.2020000@mvista.com> (raw)
In-Reply-To: <1179891586.12708.135.camel@chaos>

Thomas Gleixner wrote:
> On Tue, 2007-05-22 at 16:01 -0700, Kevin Hilman wrote:
>> Add a preempt_enable() to flush_tlb_kernel_page() since -rt4 patch
>> adds a preempt_disable but no preempt_enable().
>>
>> Signed-off-by: Kevin Hilman <khilman@mvista.com>
> 
> Good catch. Applied.

Thomas could you apply this instead?

After discussions w/RMK and validation of my own on OMAP2 (ARMv6), it
seems that these disable/enable sections aren't necessary.

Signed-off-by: Kevin Hilman <khilman@mvista.com>

reverted:
--- linux-2.6.21/include/asm-arm/tlbflush.h
+++ linux-2.6.21.orig/include/asm-arm/tlbflush.h
@@ -246,7 +246,6 @@
 	const int zero = 0;
 	const unsigned int __tlb_flag = __cpu_tlb_flags;

-	preempt_disable();
 	if (tlb_flag(TLB_WB))
 		dsb();

@@ -258,7 +257,6 @@
 		asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
 	if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL))
 		asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
-	preempt_enable();

 	if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
 		     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
@@ -276,7 +274,6 @@
 	const int asid = ASID(mm);
 	const unsigned int __tlb_flag = __cpu_tlb_flags;

-	preempt_disable();
 	if (tlb_flag(TLB_WB))
 		dsb();

@@ -297,7 +294,6 @@
 		asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid) : "cc");
 	if (tlb_flag(TLB_V6_I_ASID))
 		asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
-	preempt_enable();

 	if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
 		     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
@@ -314,7 +310,6 @@
 	const int zero = 0;
 	const unsigned int __tlb_flag = __cpu_tlb_flags;

-	preempt_disable();
 	uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);

 	if (tlb_flag(TLB_WB))
@@ -339,7 +334,6 @@
 		asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
 	if (tlb_flag(TLB_V6_I_PAGE))
 		asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
-	preempt_enable();

 	if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
 		     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
@@ -355,7 +349,6 @@
 	const int zero = 0;
 	const unsigned int __tlb_flag = __cpu_tlb_flags;

-	preempt_disable();
 	kaddr &= PAGE_MASK;

 	if (tlb_flag(TLB_WB))
@@ -406,13 +399,11 @@
 {
 	const unsigned int __tlb_flag = __cpu_tlb_flags;

-	preempt_disable();
 	if (tlb_flag(TLB_DCLEAN))
 		asm("mcr	p15, 0, %0, c7, c10, 1	@ flush_pmd"
 			: : "r" (pmd) : "cc");
 	if (tlb_flag(TLB_WB))
 		dsb();
-	preempt_enable();
 }

 static inline void clean_pmd_entry(pmd_t *pmd)

      reply	other threads:[~2007-05-24  0:46 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-05-22 23:01 [PATCH -rt] ARM TLB flush fix: don't forget to re-enable preemption Kevin Hilman
2007-05-22 23:25 ` Daniel Walker
2007-05-22 23:41   ` Kevin Hilman
2007-05-22 23:48     ` Daniel Walker
2007-05-23  9:22     ` Russell King
2007-05-23 16:13       ` Kevin Hilman
2007-05-23 16:25         ` Russell King
2007-05-23 17:31           ` Kevin Hilman
2007-05-23 16:30         ` Daniel Walker
2007-05-23  3:39 ` Thomas Gleixner
2007-05-24  0:41   ` Kevin Hilman [this message]

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