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Date: Sun, 27 May 2007 02:57:49 +0400
From: Manu Abraham <abraham.manu@gmail.com>
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To: David Miller <davem@davemloft.net>
CC: rdreier@cisco.com, greg@kroah.com, linux-pci@atrey.karlin.mff.cuni.cz,
       linux-kernel@vger.kernel.org
Subject: Re: PCIE
References: <46561287.8020103@gmail.com>	<ada1wh560u1.fsf@cisco.com>	<46584C30.4030206@gmail.com> <20070526.154910.78725926.davem@davemloft.net>
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David Miller wrote:
> From: Manu Abraham <abraham.manu@gmail.com>
> Date: Sat, 26 May 2007 19:03:12 +0400
> 
>> i presume then i shouldn't be using IRQF_SHARED, if using MSI.
> 
> That's actually a really good question.
> 
> It is likely architecture dependant whether the PCI controller wires
> unique MSI interrupts to shared cpu interrupt lines.
> 
> I can imagine many systems where the cpu simply doesn't have enough
> interrupt pins to uniquely identify every possible MSI interrupt
> source.
> 

Ok, that explains it a bit, but i am pulling out a bit of hair on the
other aspects i wrote in this thread, of course i am a bit new to PCIe
and hence all my questions/doubts. Hope someone can clear them.

Thanks,
Manu