From: Chuck Ebbert <cebbert@redhat.com>
To: Con Kolivas <kernel@kolivas.org>
Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>,
linux kernel mailing list <linux-kernel@vger.kernel.org>
Subject: Re: Wrong cache size reported on Q6600
Date: Fri, 29 Jun 2007 11:31:20 -0400 [thread overview]
Message-ID: <468525C8.2010407@redhat.com> (raw)
In-Reply-To: <200706290957.08128.kernel@kolivas.org>
On 06/28/2007 07:57 PM, Con Kolivas wrote:
> On Friday 29 June 2007 09:33, Siddha, Suresh B wrote:
>> On Fri, Jun 29, 2007 at 09:31:44AM +1000, Con Kolivas wrote:
>>> This is a Q6600 which has cache size of 8 MB. Unless it's reporting each
>>> half's effective L2, I think it should be reporting 8192 instead of 4096.
>> There are two L2's, each of 4MB. Each L2 shared by two cores.
>
> That was what I wasn't sure of as I said above; thanks for clarifying.
>
You really need to look in /sys/devices/system/cpu/cpuX/cache/ to get
any kind of useful information.
prev parent reply other threads:[~2007-06-29 15:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-28 23:31 Wrong cache size reported on Q6600 Con Kolivas
2007-06-28 23:25 ` Kyle McMartin
2007-06-28 23:33 ` Siddha, Suresh B
2007-06-28 23:57 ` Con Kolivas
2007-06-29 15:31 ` Chuck Ebbert [this message]
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