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From: Chris Snook <csnook@redhat.com>
To: Jan Engelhardt <jengelh@computergmbh.de>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: Few interrupts with NO_HZ
Date: Mon, 06 Aug 2007 10:35:30 -0400	[thread overview]
Message-ID: <46B731B2.3040409@redhat.com> (raw)
In-Reply-To: <Pine.LNX.4.64.0708061626010.13469@fbirervta.pbzchgretzou.qr>

Jan Engelhardt wrote:
> On Aug 6 2007 09:47, Chris Snook wrote:
>>> this more of an informational question. So:
>>> kernel version is 2.6.22.1 on i686
>>> /proc/uptime 9917.81 9140.90 (2h45m)
>>> /proc/cpuinfo:
>>>            CPU0
>>>   0:        282   IO-APIC-edge      timer
>>>
>>> this is kinda neat, I expected much more interrupts than just 282
>>> since boot. What kernel code actually uses the irq0 timer?
>> If you don't have an HPET (and most single-processor systems do not)
> 
> This is an AMD Athlon with 'Thoroughbred' core; it does not seem to
> have C-states at all (or: exactly one). It clearly is not idle all the
> time, sometimes I run povray. (And 282 has not changed since the
> morning.)
> 
> 
> 	Jan

In that case, it's probably the early bootstrap code that runs before the TSC is 
calibrated.  PIT sucks, but it sucks very reliably, so it's a good basis for 
calibrating the other timekeeping devices.  Once you have something better set 
up, you don't need it anymore if you're not doing C-state transitions.

	-- Chris

  reply	other threads:[~2007-08-06 14:35 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-08-06 10:52 Few interrupts with NO_HZ Jan Engelhardt
2007-08-06 13:47 ` Chris Snook
2007-08-06 14:28   ` Jan Engelhardt
2007-08-06 14:35     ` Chris Snook [this message]
2007-08-06 22:31 ` Kyle McMartin
     [not found] <fa.09fMUH3GW8WqIBDx7yLbNn+7hAo@ifi.uio.no>
2007-08-06 23:22 ` Robert Hancock

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