[patch 0/5] sdio: various bug fixes and CSR specific support

[David Vrabel <david.vrabel@csr.com>]

This set of 5 patches fixes a few bugs in the SDIO support and adds
stuff required for CSR chips.

1. SHDC PCI cards produced by Arasan (for prototyping their SHDC IP)
report an invalid maximum block size.  These cards don't have a valid
vendor or device ID so we can't blacklist them.  Instead, just assume we
can always support a block size of 512 (which is the minimum possible).

2. Ensure we set the bus width the host uses if we set the card's bus
width to 4 bit mode.  Needless to say a host sending 1 bit mode data to
a card in 4 bit mode doesn't work.

3. Add defines for CSR specific CCCR vendor registers.

4. Add vendor and device IDs for CSR chips.

5. Add sdio_f0_readb() and sdio_f0_writeb() so drivers can read/write F0
registers.

David
-- 
David Vrabel, Software Engineer, Drivers group  Tel: +44 (0)1223 692562
CSR plc, Churchill House, Cambridge Business Park, Cowley Road, CB4 0WZ


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