Re: [patches] [patch 3/5] x86: Add PCI extended config space access for AMD Barcelona

["H. Peter Anvin" <hpa@zytor.com>]

Andreas Herrmann wrote:
> On Mon, Sep 03, 2007 at 04:33:19AM -0700, Arjan van de Ven wrote:
>> On Mon, 3 Sep 2007 11:17:18 +0200
>> "Andreas Herrmann" <andreas.herrmann3@amd.com> wrote:
>> \> 
>>> Do you see any other issues besides the naming of the bit?
>> I wonder if we should key this off a PCI ID of the chipset rather than
>> the cpu id... I mean, how sure are you that all via chipsets connected
>> to the barcelona cpu will deal well?
> 
> In general they should be able to deal with those accesses. They result in
> extended type 0/1 configuration cycles which are defined already in HT I/O Link
> Spec 1.10. So if unexpectedly problems arise then it is time to add a pci-quirk.
> 
> But at the moment there is no need for further discussion on this subject
> because Andi refuses to add support for Barcelona CF8/CFC ECS access.
> 

Well, they don't add any functionality, do they?  As such, I would agree 
with Andi -- we only need one method which can (correctly) access the 
full configuration space, since it'll look the same on the bus anyway.

	-hpa