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From: Yinghai Lu <Yinghai.Lu@Sun.COM>
To: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Andi Kleen <ak@suse.de>, Greg KH <greg@kroah.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Jeff Garzik <jeff@garzik.org>, Martin Mares <mj@ucw.cz>,
	dean gaudet <dean@arctic.org>,
	Robert Richter <robert.richter@amd.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86_64: set cfg_size for AMD Family 10h in case MMCONFIG is used
Date: Thu, 13 Sep 2007 13:14:44 -0700	[thread overview]
Message-ID: <46E99A34.9070103@sun.com> (raw)
In-Reply-To: <20070913195203.GA1131@alberich.amd.com>

Andreas Herrmann wrote:
> On Thu, Sep 13, 2007 at 01:53:15PM +0200, Andi Kleen wrote:
>> On Thursday 13 September 2007 12:47, Greg KH wrote:
>>> On Thu, Sep 13, 2007 at 11:47:42AM +0200, Andi Kleen wrote:
>>>> On Thursday 13 September 2007 04:21, Yinghai Lu wrote:
>>>>> [PATCH] x86_64: set cfg_size for AMD Family 10h in case MMCONFIG is
>>>>> used.
>>>>>
>>>>> reuse pci_cfg_space_size but skip check pci express and pci-x CAP ID.
>>>> I just rejected a similar patch -- this should be done using MMCONFIG
>>> But what about for broken machines without the proper MMCONFIG entries?
>>> They still need a way to get access to this config space,
>> If there are any devices that need it. IBS and PCI-E error handling 
>> do, but they're quite obscure.
>>
>> Also so far we don't know of any Fam 10h systems without MMCONFIG
>> entries. Fam10h requires a new BIOS so it's reasonable to assume
>> that the new BIOSes will do better.
> 
> IMHO support for all config space access methods should be added to the kernel.
> And it should be added at a central point. Not waiting for drivers to do it
> their own way if they need to use it.
> 
> The more complicated/important question is how to decide which access method
> should be used for a device. (Something similar to the pci_mmcfg_fallback_slots
> stuff that exists already for K8 NB.)
> But that needs some more thinking.
> 
> Here a summary wrt family 10h extended config space access methods.
> (Most of this stuff I verified with some patched kernels. I didn't
> eavesdropping on the physical links though ...)
> 
> For family 10h we have 3 methods
> (1) "legacy" MMCONFIG access (via south bridge)
> (2) mmconfig access via CPU/NB (new with fam10h, using the new MMIO
>     config base MSR)
> (3) CF8/CFC ECS access (new with fam10h, has to be enabled in the NB_CFG MSR)

ECS access in NB_CFG_MSR is always enabled. because BIOS need to use that to do mem initialization.

mmconfig enablement in BIOS is depending ....

YH

      reply	other threads:[~2007-09-13 20:05 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-09-13  2:21 [PATCH] x86_64: set cfg_size for AMD Family 10h in case MMCONFIG is used Yinghai Lu
2007-09-13  2:17 ` Andrew Morton
2007-09-13  9:47 ` Andi Kleen
2007-09-13 10:47   ` Greg KH
2007-09-13 11:53     ` Andi Kleen
2007-09-13 17:01       ` Yinghai Lu
2007-09-13 17:20         ` H. Peter Anvin
2007-09-13 19:22           ` Yinghai Lu
2007-09-13 19:31             ` H. Peter Anvin
2007-09-13 20:15           ` Andreas Herrmann
2007-09-13 20:54             ` H. Peter Anvin
2007-09-14 11:21               ` [PATCH] x86_64: set cfg_size for AMD Family 10h in case MMCONFIG Andreas Herrmann
2007-09-14 14:08                 ` H. Peter Anvin
2007-09-14 17:28                 ` Yinghai Lu
2007-09-14 18:09                 ` Yinghai Lu
2007-09-16  3:18           ` [PATCH] x86_64: set cfg_size for AMD Family 10h in case MMCONFIG is used Andi Kleen
2007-09-13 19:52       ` Andreas Herrmann
2007-09-13 20:14         ` Yinghai Lu [this message]

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