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From: Keith Owens <kaos@sgi.com>
To: Andi Kleen <ak@suse.de>
Cc: linux-kernel@vger.kernel.org
Subject: Re: NMI problems with Dell SMP Xeons
Date: Tue, 23 May 2006 11:26:46 +1000	[thread overview]
Message-ID: <4715.1148347606@kao2.melbourne.sgi.com> (raw)
In-Reply-To: Your message of "Tue, 23 May 2006 01:56:39 +0200." <200605230156.40149.ak@suse.de>

Andi Kleen (on Tue, 23 May 2006 01:56:39 +0200) wrote:
>
>> (1) IPI 2, not marked as NMI.  This does _not_ call into the do_nmi()
>>     routine.
>> 
>>     People have been telling me (hi, Andi:) that sending interrupt 2 as
>>     an IPI automatically sends it as an NMI. 
>
>I can't remember ever saying that. I said that sending anything with the 
>NMI bit set will end up at the NMI vector, not the original vector
>you specified. Or at least that is what the Intel manual specify.
>That is why it is useless to hook the original vector like you did
>and add special cases just to get an NMI send with different vector.

I have never disagreed that all NMIs will end up on the NMI vector (2).
But there still has to be code in arch/*/kernel to detect that the IPI
being sent is to be marked as NMI, IOW you still need the code that
sets APIC_DM_NMI.  Whether that is done by using a special vector
number (i386 does) or by defining a separate routine for sending NMI
(x86_64 does) is a matter for debate.

Unfortunately the way that you changed the x86_64 kdb code, it now does
neither.  Your hack to kdb sends an IPI using NMI_VECTOR (2) which is

(a) not actually sent as an NMI and
(b) on most of the hardware I have tested, it does not even get through
    to the other cpus, instead it generates APIC errors.

FWIW, kdb on ia64 first sends a normal maskable IPI using its own
KDB_VECTOR and waits for the other cpus to rendezvous.  Only if some
cpus have not rendezvoused does ia64 kdb resort to using a non-maskable
interrupt.  I have found that this gives much better backtracing and is
more reliable.  It is a sad fact of life that NMIs can be delivered in
the middle of code that sets up the kernel stack, when that happens it
is impossible to backtrace.  I am changing kdb on i386 to do the same
two step process, try a normal interrupt first, wait a bit then resort
to NMI.


  reply	other threads:[~2006-05-23  1:28 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-05-22  9:08 NMI problems with Dell SMP Xeons Keith Owens
2006-05-22 23:56 ` Andi Kleen
2006-05-23  1:26   ` Keith Owens [this message]
2006-05-23  1:55     ` Andi Kleen
2006-05-23  2:02       ` Keith Owens
2006-05-23  2:21         ` Keith Owens
2006-05-23  5:03 ` Keith Owens
2006-06-07  4:49   ` Keith Owens
2006-06-07  7:20     ` Andi Kleen
2006-06-07  7:43       ` Keith Owens
2006-06-07  8:01         ` Andi Kleen
2006-06-07 11:47           ` Keith Owens
2006-06-07 12:13             ` Andi Kleen
2006-06-07 15:18         ` Brendan Trotter
2006-06-07 15:23           ` Andi Kleen
2006-06-07 18:47           ` Rajesh Shah
2006-06-08  0:41             ` Rajesh Shah
2006-06-08  0:46           ` Rajesh Shah
2006-06-08  5:11           ` Keith Owens

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