From: "H. Peter Anvin" <hpa@zytor.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: Venki Pallipadi <venkatesh.pallipadi@intel.com>,
Thomas Gleixner <tglx@linutronix.de>, Len Brown <lenb@kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86: Voluntary leave_mm before entering ACPI C3
Date: Wed, 19 Dec 2007 11:48:14 -0800 [thread overview]
Message-ID: <4769757E.306@zytor.com> (raw)
In-Reply-To: <20071219194032.GA8849@elte.hu>
Ingo Molnar wrote:
>
> i dont think it's required for C3 to even turn off any portion of the
> CPU - if an interrupt arrives after the C3 sequence is initiated but
> just before dirty cachelines have been flushed then the CPU can just
> return without touching anything (such as the TLB) - right? So i dont
> think there's any implicit guarantee of TLB flushing (nor should there
> be), but in practice, a good C3 sequence would (statistically) turn off
> large portions of the CPU and hence the TLB as well.
>
I think C3 guarantees that the cache contents stay intact, and thus it
might make sense in some technology to preserve the TLB as well (being a
kind of cache.)
Otherwise, what you say here of course is absolutely correct.
-hpa
next prev parent reply other threads:[~2007-12-19 19:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-12-19 18:34 [PATCH] x86: Voluntary leave_mm before entering ACPI C3 Venki Pallipadi
2007-12-19 19:32 ` Ingo Molnar
2007-12-19 19:36 ` H. Peter Anvin
2007-12-19 19:40 ` Ingo Molnar
2007-12-19 19:48 ` H. Peter Anvin [this message]
2007-12-19 20:23 ` Venki Pallipadi
2007-12-20 7:53 ` Arjan van de Ven
2007-12-20 16:16 ` H. Peter Anvin
2007-12-20 18:22 ` Arjan van de Ven
2007-12-20 18:32 ` H. Peter Anvin
2007-12-20 19:28 ` Len Brown
2007-12-19 19:56 ` Venki Pallipadi
2007-12-19 20:54 ` Ingo Molnar
2007-12-20 2:08 ` Venki Pallipadi
2007-12-20 9:31 ` Ingo Molnar
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