Re: [PATCH] x86: use explicit timing delay for pit accesses in kernel and pcspkr driver

[Rene Herman <rene.herman@keyaccess.nl>]

On 18-02-08 22:44, H. Peter Anvin wrote:
> Rene Herman wrote:
>>
>> I mean that before the linux kernel used a port 0x80 write as an I/O 
>> delay it used a short jump (two in a row actually...) as such and this 
>> was at the time that it actually ran on the old legacy stuff that is 
>> of most concern here.
>>
>> No, if I'm not mistaken, those two jumps are actually what the 
>> udelay() is going to do anyway as part of delay_loop() at that early 
>> stage so that even before loops_per_jiffy calibration, I believe we 
>> should still be okay.
>>
> 
> That doesn't make any sense at all.  The whole point why the two jumps 
> were obsoleted with the P5 (or even late P4, if I'm not mistaken) was 
> because they were utterly insufficient when the CPU ran at something 
> much higher than the external speed.

Yes, but generally not any P5+ system is going to need the PIT delay in the 
first place meaning it just doesn't matter. There were the VIA issues with 
the PIC but unless I missed it not with the PIT.

That's the point. It's fairly unclean to say udelay(2) and then not delay 
for 2 microseconds but you _have_ done the two short jumps meaning 386 and 
486 systems are okay and later systems were okay to start with.

Rene.