From: Andi Kleen <andi@firstfloor.org>
To: "Moore, Eric" <Eric.Moore@lsi.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: HELP: Is writeq an atomic operation??
Date: Sat, 03 May 2008 01:13:41 +0200 [thread overview]
Message-ID: <481BA025.8020804@firstfloor.org> (raw)
In-Reply-To: <0631C836DBF79F42B5A60C8C8D4E822901047B42@NAMAIL2.ad.lsil.com>
Moore, Eric wrote:
> On Friday, May 02, 2008 4:50 PM, Andi Kleen wrote:
>>> Here is a trace from pci express analyzer. I'm sending
>> With what CPU/chipset was that?
>>
>
> I'm developing sas driver for next generation controllers. They should
> work at least on x86, x86_64, ia64, and ppc64. The host I was using for
> gathering that trace was x86_64 Intel Platform. Here is the lspci
> output:
I doubt the CPU was to blame. Probably the chipset split it up for some
reason. Did you check the data sheets?
At the CPU level writeq is simply a 64bit store on x86-64 Linux.
-Andi
next prev parent reply other threads:[~2008-05-02 23:13 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-05-02 22:40 HELP: Is writeq an atomic operation?? Moore, Eric
2008-05-02 22:46 ` Roland Dreier
2008-05-03 0:42 ` H. Peter Anvin
2008-05-03 14:35 ` Alan Cox
2008-05-03 17:40 ` H. Peter Anvin
2008-05-03 22:37 ` Benjamin Herrenschmidt
2008-05-04 17:01 ` Roland Dreier
2008-05-02 22:50 ` Andi Kleen
2008-05-02 23:03 ` Moore, Eric
2008-05-02 23:13 ` Andi Kleen [this message]
2008-05-02 23:04 ` Roland Dreier
2008-05-02 23:20 ` Moore, Eric
2008-05-03 0:10 ` Roland Dreier
2008-05-02 23:12 ` Jesse Barnes
2008-05-03 0:41 ` H. Peter Anvin
[not found] <0631C836DBF79F42B5A60C8C8D4E822901047B1D@NAMAIL2.ad.lsil.com>
2008-05-02 22:32 ` David Miller
2008-05-02 22:43 ` Roland Dreier
2008-05-02 22:49 ` David Miller
2008-05-02 22:49 ` Moore, Eric
2008-05-02 22:53 ` Roland Dreier
2008-05-02 23:13 ` Moore, Eric
2008-05-02 23:21 ` Roland Dreier
2008-05-02 23:31 ` Moore, Eric
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