Re: i387/FPU init issues...

["H. Peter Anvin" <hpa@zytor.com>]

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jamal wrote:
> 
> Indeed it does - thanks.
> 
>> Please provide
>> also output of /proc/cpuinfo.
> 
> mambo:~# cat /proc/cpuinfo
> processor       : 0
> vendor_id       : GenuineIntel
> cpu family      : 6
> model           : 3
> model name      : Pentium II (Klamath)
> stepping        : 3
> cpu MHz         : 1063.771
> cache size      : 128 KB
> fdiv_bug        : no
> hlt_bug         : no
> f00f_bug        : no
> coma_bug        : no
> fpu             : yes
> fpu_exception   : yes
> cpuid level     : 2
> wp              : yes
> flags           : fpu de pse tsc msr pae mce cx8 sep pge cmov mmx fxsr
> sse sse2
> bogomips        : 2160.92
> clflush size    : 32
> power management:
> 

This is very odd.

Could you try running the attached C program on this processor and 
report the result?  (Binary included for convenience.)

Arjan: this seems to directly contradict the Intel documentation.  Do 
you have any way to find out what the deal is with this?

	-hpa

[-- Attachment #2: p6nops.c --]
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#include <setjmp.h>
#include <signal.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>

#define P6_NOP1 ".byte 0x90\n"
#define P6_NOP2 ".byte 0x66,0x90\n"
#define P6_NOP3 ".byte 0x0f,0x1f,0x00\n"
#define P6_NOP4 ".byte 0x0f,0x1f,0x40,0\n"
#define P6_NOP5 ".byte 0x0f,0x1f,0x44,0x00,0\n"
#define P6_NOP6 ".byte 0x66,0x0f,0x1f,0x44,0x00,0\n"
#define P6_NOP7 ".byte 0x0f,0x1f,0x80,0,0,0,0\n"
#define P6_NOP8 ".byte 0x0f,0x1f,0x84,0x00,0,0,0,0\n"

static sigjmp_buf bail_buf;

static void sigill(int sig)
{
	(void)sig;
	siglongjmp(bail_buf, 1);
}

static int do_test(int n)
{
	struct sigaction old_sa, sa;
	int err;

	memset(&sa, 0, sizeof sa);
	sa.sa_handler = sigill;
	sigaction(SIGILL, &sa, &old_sa);

	err = sigsetjmp(bail_buf, 1);
	if (!err) {
		switch (n) {
		case -1:
			asm volatile("ud2a"); /* Test the mechanism */
			break;
		case 0:
			asm volatile("");
			break;
		case 1:
			asm volatile(P6_NOP1);
			break;
		case 2:
			asm volatile(P6_NOP2);
			break;
		case 3:
			asm volatile(P6_NOP3);
			break;
		case 4:
			asm volatile(P6_NOP4);
			break;
		case 5:
			asm volatile(P6_NOP5);
			break;
		case 6:
			asm volatile(P6_NOP6);
			break;
		case 7:
			asm volatile(P6_NOP7);
			break;
		case 8:
			asm volatile(P6_NOP8);
			break;
		default:
			abort();
		}
	}

	sigaction(SIGILL, &old_sa, NULL);
	return err;
}

int main(void)
{
	int i;
	int test, err = 0;

	if (!do_test(-1)) {
		printf("Trap mechanism broken!\n");
		return 2;
	}

	for (i = 0; i <= 8; i++) {
		test = do_test(i);
		err |= test;
		printf("Test %d: %s\n", i, test ? "err" : "ok");
	}

	return err;
}

[-- Attachment #3: p6nops --]
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