Re: [BISECTED] Lots of "rescheduling IPIs" in powertop

[Andi Kleen <andi@firstfloor.org>]

> The desktop is a P4:
> 
> processor       : 0
> vendor_id       : GenuineIntel
> cpu family      : 15
> model           : 6
> model name      : Intel(R) Pentium(R) 4 CPU 3.00GHz
> stepping        : 5
> cpu MHz         : 2992.624
> cache size      : 2048 KB

> flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
> mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx
> lm constant_tsc pebs bts pni monitor ds_cpl est tm2 cid cx16 xtpr
> lahf_lm
> bogomips        : 5990.81
> clflush size    : 64
> 
> (similar for processor 1)
> 
> # msr
> 0

Ok the CPU reports it doesn't support any C states in MWAIT. If that is
correct then it would be correct to not use MWAIT idle and might
actually save more power to not use it.

I don't know if that's true or not. Do you have a power meter perhaps?
If yes can you measure if there's a difference between mwait=idle /
default on your box when it is idle?

[cc Arjan he might now if that CPU is supposed to support C1 in MWAIT]

> 
> The laptop is a Pentium Dual-Core:
> 
> processor       : 0
> vendor_id       : GenuineIntel
> cpu family      : 6
> model           : 15
> model name      : Intel(R) Pentium(R) Dual  CPU  T2310  @ 1.46GHz
> stepping        : 13
> cpu MHz         : 800.000
> cache size      : 1024 KB
...
> flags           : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca
> cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe lm
> constant_tsc arch_perfmon pebs bts pni monitor ds_cpl est tm2 ssse3
> cx16 xtpr lahf_lm
> bogomips        : 2930.23
> clflush size    : 64
> 
> (similar for processor 1)
> 
> # ./msr
> 1110

CPU reports it supports C1/C2/C3. Are you sure there is a difference on
that box? The code should have kept using MWAIT because it checks C1.
Please double check.

-Andi