From: "H. Peter Anvin" <hpa@zytor.com>
To: Dave Jones <davej@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Yinghai Lu <yhlu.kernel@gmail.com>,
Linux Kernel <linux-kernel@vger.kernel.org>,
Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [X86] Add recent Centaur CPUs to PAT whitelist
Date: Thu, 22 May 2008 09:48:44 -0700 [thread overview]
Message-ID: <4835A3EC.1030307@zytor.com> (raw)
In-Reply-To: <20080522140753.GB20613@redhat.com>
Dave Jones wrote:
> On Wed, May 21, 2008 at 04:56:28PM -0700, H. Peter Anvin wrote:
> > Dave Jones wrote:
> > >
> > > From conversation with Centaur engineers, both the newer generations
> > > of the VIA C7, and their future CPUs support PAT, with no known errata.
> > >
> > > Signed-off-by: Dave Jones <davej@redhat.com>
> > >
> >
> > Question: are there any VIA CPUs that display the PAT CPUID flag that
> > aren't covered by the above?
>
> No. They only added PAT support with the current Esther (C7) generation iirc.
>
OK, so we should just enable VIA unconditionally as long as PAT is
displayed and not worry about generation numbers; same with Transmeta
(only the Transmeta Efficeon supported PAT, and it had a
strictly-coherent memory system.)
-hpa
next prev parent reply other threads:[~2008-05-22 16:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-05-20 4:09 [X86] Add recent Centaur CPUs to PAT whitelist Dave Jones
2008-05-20 5:49 ` Yinghai Lu
2008-05-20 13:19 ` Dave Jones
2008-05-21 23:56 ` H. Peter Anvin
2008-05-22 14:07 ` Dave Jones
2008-05-22 16:48 ` H. Peter Anvin [this message]
2008-05-22 17:02 ` Dave Jones
2008-05-22 20:23 ` H. Peter Anvin
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