Re: [RFC 00/15] x86_64: Optimize percpu accesses

[Jeremy Fitzhardinge <jeremy@goop.org>]

Christoph Lameter wrote:
> Jeremy Fitzhardinge wrote:
>
>   
>> No, it makes no difference.  %gs:X always has a 32-bit offset in the
>> instruction, regardless of how big X is:
>>
>>     mov %eax, %gs:0
>>     mov %eax, %gs:0x1234567
>> ->
>>   0:    65 89 04 25 00 00 00 00    mov    %eax,%gs:0x0
>>   8:    65 89 04 25 67 45 23 01    mov    %eax,%gs:0x1234567
>>     
>
> The processor itself supports smaller offsets.
>   

Not in 64-bit mode.  In 32-bit mode you can use the addr16 prefix, but 
that would only save a byte per use (and I doubt it's a fast-path in the 
processor).

> Note also that the 32 bit offset size limits the offset that can be added to the segment register. You either need to place the per cpu area either in the last 2G of the address space or in the first 2G. The zero based approach removes that limitation.
>   

No.  The %gs base is a full 64-bit value you can put anywhere in the 
address space.  So long as your percpu data is within 2G of that point 
you can get to it directly.


>>   0:    65 89 05 00 00 00 00     mov    %eax,%gs:0(%rip)        # 0x7
>>     
>
> RIP relative also implies a 32 bit offset meaning that the code cannot be more than 2G away from the per cpu area.
>   

It means the percpu symbols must be within 2G of your code.  We can't 
compile the kernel any other way (there's no -mcmodel=large-kernel).

    J