From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751399AbbIJWw2 (ORCPT ); Thu, 10 Sep 2015 18:52:28 -0400 Received: from mail.eperm.de ([89.247.134.16]:34092 "EHLO mail.eperm.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751018AbbIJWw0 (ORCPT ); Thu, 10 Sep 2015 18:52:26 -0400 From: Stephan Mueller To: Tim Chen Cc: Herbert Xu , "H. Peter Anvin" , "David S.Miller" , Sean Gulley , Chandramouli Narayanan , Vinodh Gopal , James Guilford , Wajdi Feghali , Jussi Kivilinna , linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/4] crypto: [sha] glue code for Intel SHA extensions optimized SHA1 & SHA256 Date: Fri, 11 Sep 2015 00:52:20 +0200 Message-ID: <4887557.26yiVA9gU0@tauon.atsec.com> User-Agent: KMail/4.14.9 (Linux/4.1.6-200.fc22.x86_64; KDE/4.14.9; x86_64; ; ) In-Reply-To: <1441924040.4322.3.camel@schen9-desk2.jf.intel.com> References: <1441924040.4322.3.camel@schen9-desk2.jf.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Donnerstag, 10. September 2015, 15:27:20 schrieb Tim Chen: Hi Tim, >This patch adds the glue code to detect and utilize the Intel SHA >extensions optimized SHA1 and SHA256 update transforms when available. > >This code has been tested on Broxton for functionality. A general comment on this file: shouldn't this file be cleaned and use the standard mechanisms of the kernel crypto API? This glue implements its own selection of which SHA implementation to use. But the kernel crypto API implements that logic already. The issue with the current implementation in this file is that you have no clue which particular implementation of SHA is in use in one particular case. So, may I suggest a restructuring to define independent instances of SHA, such as - cra_name == "sha1", cra_driver_name="sha1_ssse3", cra_priority=300 - cra_name == "sha1", cra_driver_name="sha1_avx", cra_priority=400 - cra_name == "sha1", cra_driver_name="sha1_avx2", cra_priority=500 - cra_name == "sha1", cra_driver_name="sha1_shavx", cra_priority=600 Similarly for the other SHAs? In all the register functions for the ciphers, you can bail out if the hardware does not support an implementation. Ciao Stephan