ia64 start secondary cpus: what's the first line where interrupts can arrive?

ia64 start secondary cpus: what's the first line where interrupts can arrive?

[Manfred Spraul]

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Hi,

For my rcu implementation, I try to figure out how the boot process for 
secondary cpus works.

arch/ia64/kernel/smpboot.c contains the following code:
> static void __cpuinit
> smp_callin (void)
> {
> [snip]
>         per_cpu(cpu_state, cpuid) = CPU_ONLINE;
>         spin_unlock(&vector_lock);
>         ipi_call_unlock_irq();
> <<<<<
> <<<<< ipi_call_unlock_irq() does local_irq_enable()
> <<<<<
>         smp_setup_percpu_timer();
>
>         ia64_mca_cmc_vector_setup();    /* Setup vector on AP */
>
> #ifdef CONFIG_PERFMON
>         pfm_init_percpu();
> #endif
>
>         local_irq_enable();
> <<<<<
> <<<<< Another local_irq_enable().
> <<<<<
Which of these two local_irq_enable()'s is the right one?

And: IMHO it's unclean to abuse ipi_call_unlock_irq() to enable the 
local interrupts.
What about the attached patch? Untested due to lack of test hardware.

--
    Manfred

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diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 03f1a99..f4868d2 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -396,14 +396,17 @@ smp_callin (void)
 
 	fix_b0_for_bsp();
 
-	ipi_call_lock_irq();
+	ipi_call_lock();
 	spin_lock(&vector_lock);
 	/* Setup the per cpu irq handling data structures */
 	__setup_vector_irq(cpuid);
 	cpu_set(cpuid, cpu_online_map);
 	per_cpu(cpu_state, cpuid) = CPU_ONLINE;
 	spin_unlock(&vector_lock);
-	ipi_call_unlock_irq();
+	ipi_call_unlock();
+	
+	/* begin processing interrupts */
+	local_irq_enable();
 
 	smp_setup_percpu_timer();
 
@@ -413,8 +416,6 @@ smp_callin (void)
 	pfm_init_percpu();
 #endif
 
-	local_irq_enable();
-
 	if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
 		/*
 		 * Synchronize the ITC with the BP.  Need to do this after irqs are