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Date: Tue, 09 Sep 2008 08:14:19 -0500
From: Jason Wessel <jason.wessel@windriver.com>
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To: Atsuo Igarashi <atsuo_igarashi@tripeaks.co.jp>
CC: linux-kernel@vger.kernel.org, Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>,
       Tom Rini <trini@kernel.crashing.org>
Subject: Re: [PATCH] kgdb: could not write to the last of valid memory with
 kgdb.
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Atsuo Igarashi wrote:
> Hi,
>
> I'm using i.MX31 ARM11 board which has 104Mbyte valid memory.  When
> I'd invoked a print command to write the last of valid memory from
> gdb, there was no response from kgdb.
> It seems that the following line causes this problem.
>
> kernel/kgdb.c: write_mem_msg()
> ...
>  491             flush_icache_range(addr, addr + length + 1);
>
> If the last byte of valid memory is specified, the last cache line
> and the next cache line will be flushed by the ARM11 V6's function
> from flush_icache_range().  I'm not sure why the 2nd parameter has
> +1, I assume this +1 is unnecessary for ARM11 V6's cache.  I send a
> patch to remove this +1, does anyone know necessity for other
> architectures?

I had to go digging through the archives to find out where the "+1"
came from, as it pre-dates my involvement with kgdb.  It turns out
this actually appeared in the initial version of the 'X' 'M' gdb
serial packet write.

You can see historical first version if you scroll to line 973 at:

http://kgdb.cvs.sourceforge.net/kgdb/kgdb-2/core-lite.patch?annotate=1.40

That means we have carried this for 3 years, 10 months with no one
noticing it. :-)

The flush_icache_range() is a "start" to "end" address so there should
be no need for the +1, as it is already computed by adding the length.
I will queue this patch for some testing and pushing into the
mainline.

Thanks,
Jason.