* num_possible_cpus() giving more than possible.
@ 2008-09-26 20:22 Steven Rostedt
2008-09-26 23:09 ` Mike Travis
0 siblings, 1 reply; 2+ messages in thread
From: Steven Rostedt @ 2008-09-26 20:22 UTC (permalink / raw)
To: Mike Travis; +Cc: Peter Zijlstra, LKML
Hi Mike,
Peter told me that I should report this to you. I have two socket
single core hyper threaded box (must be hell). Peter told me that the
num_possible_cpus() should return the number possible on this box. The
explanation of my box tells us it should be 4. But it in fact returns 8.
nr_cpu_ids also returns 8.
here's the /proc/cpuinfo:
processor : 0
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Xeon(TM) CPU 2.80GHz
stepping : 1
cpu MHz : 2793.151
cache size : 1024 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca
cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
lm constant_tsc pebs bts nopl pni monitor ds_cpl cid cx16 xtpr
bogomips : 5586.30
clflush size : 64
cache_alignment : 128
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Xeon(TM) CPU 2.80GHz
stepping : 1
cpu MHz : 2793.151
cache size : 1024 KB
physical id : 3
siblings : 2
core id : 0
cpu cores : 1
apicid : 6
initial apicid : 6
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca
cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
lm constant_tsc pebs bts nopl pni monitor ds_cpl cid cx16 xtpr
bogomips : 5586.20
clflush size : 64
cache_alignment : 128
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 2
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Xeon(TM) CPU 2.80GHz
stepping : 1
cpu MHz : 2793.151
cache size : 1024 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca
cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
lm constant_tsc pebs bts nopl pni monitor ds_cpl cid cx16 xtpr
bogomips : 5586.23
clflush size : 64
cache_alignment : 128
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 3
vendor_id : GenuineIntel
cpu family : 15
model : 4
model name : Intel(R) Xeon(TM) CPU 2.80GHz
stepping : 1
cpu MHz : 2793.151
cache size : 1024 KB
physical id : 3
siblings : 2
core id : 0
cpu cores : 1
apicid : 7
initial apicid : 7
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca
cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
lm constant_tsc pebs bts nopl pni monitor ds_cpl cid cx16 xtpr
bogomips : 5586.27
clflush size : 64
cache_alignment : 128
address sizes : 36 bits physical, 48 bits virtual
power management:
Perhaps since my physical ids show 0 and 3, it thinks it can also have
a 1 and 2?
Thanks,
-- Steve
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: num_possible_cpus() giving more than possible.
2008-09-26 20:22 num_possible_cpus() giving more than possible Steven Rostedt
@ 2008-09-26 23:09 ` Mike Travis
0 siblings, 0 replies; 2+ messages in thread
From: Mike Travis @ 2008-09-26 23:09 UTC (permalink / raw)
To: Steven Rostedt; +Cc: Peter Zijlstra, LKML
Steven Rostedt wrote:
> Hi Mike,
>
> Peter told me that I should report this to you. I have two socket
> single core hyper threaded box (must be hell). Peter told me that the
> num_possible_cpus() should return the number possible on this box. The
> explanation of my box tells us it should be 4. But it in fact returns 8.
It looks like the APIC discovery code is finding 2 dual cores w/HT. I'm
no expert in how all this works but it's assigning
proc 0/2 --> phys id 0 w/2 HT
proc 1/3 --> phys id 3 w/2 HT
Either the BIOS on your machine is confusing the APIC code, the APIC code
has a bug, or you've found an Easter egg... ;-)
>
> nr_cpu_ids also returns 8.
Yes, this reflects the number of possible cpus if all were enabled. On
our systems, we can designate a number of cores to be "present" but
"disabled". Perhaps a "low bin" cpu is basically a dual core with the
non-working core disabled, but still accounted for in the BIOS APIC
tables?
Cheers,
Mike
>
> here's the /proc/cpuinfo:
>
> processor : 0
.
> physical id : 0
> siblings : 2
> core id : 0
> cpu cores : 1
> apicid : 0
> initial apicid : 0
.
>
> processor : 1
.
> physical id : 3
> siblings : 2
> core id : 0
> cpu cores : 1
> apicid : 6
> initial apicid : 6
.
>
> processor : 2
.
> physical id : 0
> siblings : 2
> core id : 0
> cpu cores : 1
> apicid : 1
> initial apicid : 1
.
>
> processor : 3
.
> physical id : 3
> siblings : 2
> core id : 0
> cpu cores : 1
> apicid : 7
> initial apicid : 7
.
> Perhaps since my physical ids show 0 and 3, it thinks it can also have
> a 1 and 2?
>
> Thanks,
>
> -- Steve
>
>
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