* [patch 1/2] x86: apic - lapic_setup_esr does not handle esr_disable - fix it
[not found] <20080914075536.619891882@gmail.com>
@ 2008-09-14 7:55 ` Cyrill Gorcunov
2008-09-14 7:55 ` [patch 2/2] x86: apic - skip writting ESR register if we dont have on Cyrill Gorcunov
1 sibling, 0 replies; 2+ messages in thread
From: Cyrill Gorcunov @ 2008-09-14 7:55 UTC (permalink / raw)
To: mingo, macro, linux-kernel; +Cc: yhlu.kernel, Cyrill Gorcunov
[-- Attachment #1: x86-apic-fix-lapic_setup_esr --]
[-- Type: text/plain, Size: 2728 bytes --]
lapic_setup_esr doesn't handle esr_disable inquire.
The error brought in during unification process.
Fix it.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
I've simplified this procedure, ie the algo is following
- check if apic is not 82489DX (which doesn't have ESR at all)
- check if ESR was asked to not being touched
- normal handling of ESR
Index: linux-2.6.git/arch/x86/kernel/apic.c
===================================================================
--- linux-2.6.git.orig/arch/x86/kernel/apic.c 2008-09-13 16:58:48.000000000 +0400
+++ linux-2.6.git/arch/x86/kernel/apic.c 2008-09-14 11:46:02.000000000 +0400
@@ -1081,40 +1081,43 @@ void __init init_bsp_APIC(void)
static void __cpuinit lapic_setup_esr(void)
{
- unsigned long oldvalue, value, maxlvt;
- if (lapic_is_integrated() && !esr_disable) {
- if (esr_disable) {
- /*
- * Something untraceable is creating bad interrupts on
- * secondary quads ... for the moment, just leave the
- * ESR disabled - we can't do anything useful with the
- * errors anyway - mbligh
- */
- printk(KERN_INFO "Leaving ESR disabled.\n");
- return;
- }
- /* !82489DX */
- maxlvt = lapic_get_maxlvt();
- if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
- apic_write(APIC_ESR, 0);
- oldvalue = apic_read(APIC_ESR);
-
- /* enables sending errors */
- value = ERROR_APIC_VECTOR;
- apic_write(APIC_LVTERR, value);
+ unsigned int oldvalue, value, maxlvt;
+
+ if (!lapic_is_integrated()) {
+ printk(KERN_INFO "No ESR for 82489DX.\n");
+ return;
+ }
+
+ if (esr_disable) {
/*
- * spec says clear errors after enabling vector.
+ * Something untraceable is creating bad interrupts on
+ * secondary quads ... for the moment, just leave the
+ * ESR disabled - we can't do anything useful with the
+ * errors anyway - mbligh
*/
- if (maxlvt > 3)
- apic_write(APIC_ESR, 0);
- value = apic_read(APIC_ESR);
- if (value != oldvalue)
- apic_printk(APIC_VERBOSE, "ESR value before enabling "
- "vector: 0x%08lx after: 0x%08lx\n",
- oldvalue, value);
- } else {
- printk(KERN_INFO "No ESR for 82489DX.\n");
+ printk(KERN_INFO "Leaving ESR disabled.\n");
+ return;
}
+
+ maxlvt = lapic_get_maxlvt();
+ if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
+ apic_write(APIC_ESR, 0);
+ oldvalue = apic_read(APIC_ESR);
+
+ /* enables sending errors */
+ value = ERROR_APIC_VECTOR;
+ apic_write(APIC_LVTERR, value);
+
+ /*
+ * spec says clear errors after enabling vector.
+ */
+ if (maxlvt > 3)
+ apic_write(APIC_ESR, 0);
+ value = apic_read(APIC_ESR);
+ if (value != oldvalue)
+ apic_printk(APIC_VERBOSE, "ESR value before enabling "
+ "vector: 0x%08x after: 0x%08x\n",
+ oldvalue, value);
}
--
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