* [PATCH] xhci-pci: Allow host runtime PM as default for Intel Alder Lake xHCI
@ 2021-04-06 23:35 Azhar Shaikh
2021-04-07 10:54 ` Mathias Nyman
0 siblings, 1 reply; 2+ messages in thread
From: Azhar Shaikh @ 2021-04-06 23:35 UTC (permalink / raw)
To: mathias.nyman, gregkh, p.zabel, linux-usb
Cc: mika.westerberg, abhijeet.rao, nikunj.dadhania, linux-kernel,
azhar.shaikh
From: Abhijeet Rao <abhijeet.rao@intel.com>
In the same way as Intel Tiger Lake TCSS (Type-C Subsystem) the Alder Lake
TCSS xHCI needs to be runtime suspended whenever possible to allow the
TCSS hardware block to enter D3cold and thus save energy.
Signed-off-by: Abhijeet Rao <abhijeet.rao@intel.com>
Signed-off-by: Nikunj A. Dadhania <nikunj.dadhania@intel.com>
Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com>
---
drivers/usb/host/xhci-pci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 5bbccc9a0179..a858add8436c 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -57,6 +57,7 @@
#define PCI_DEVICE_ID_INTEL_CML_XHCI 0xa3af
#define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13
#define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138
+#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI 0x461e
#define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
#define PCI_DEVICE_ID_AMD_PROMONTORYA_3 0x43ba
@@ -243,7 +244,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI ||
pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI ||
pdev->device == PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI))
+ pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI ||
+ pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI))
xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] xhci-pci: Allow host runtime PM as default for Intel Alder Lake xHCI
2021-04-06 23:35 [PATCH] xhci-pci: Allow host runtime PM as default for Intel Alder Lake xHCI Azhar Shaikh
@ 2021-04-07 10:54 ` Mathias Nyman
0 siblings, 0 replies; 2+ messages in thread
From: Mathias Nyman @ 2021-04-07 10:54 UTC (permalink / raw)
To: Azhar Shaikh, gregkh, p.zabel, linux-usb
Cc: mika.westerberg, abhijeet.rao, nikunj.dadhania, linux-kernel
On 7.4.2021 2.35, Azhar Shaikh wrote:
> From: Abhijeet Rao <abhijeet.rao@intel.com>
>
> In the same way as Intel Tiger Lake TCSS (Type-C Subsystem) the Alder Lake
> TCSS xHCI needs to be runtime suspended whenever possible to allow the
> TCSS hardware block to enter D3cold and thus save energy.
>
> Signed-off-by: Abhijeet Rao <abhijeet.rao@intel.com>
> Signed-off-by: Nikunj A. Dadhania <nikunj.dadhania@intel.com>
> Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com>
> ---
> drivers/usb/host/xhci-pci.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Thanks, Added to queue
-Mathias
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2021-04-07 10:52 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-04-06 23:35 [PATCH] xhci-pci: Allow host runtime PM as default for Intel Alder Lake xHCI Azhar Shaikh
2021-04-07 10:54 ` Mathias Nyman
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox