PCIe interface memory memory mapping issue

PCIe interface memory memory mapping issue

[Sanka Piyaratna]

Hi,

I have developed a PCI express interface using Xilinx ML555 hardware module. I have implemented Linux kernel mode device drivers and everything works correctly as long as I am using the device within a computer with dual channel DDR arrangement. However, as soon as I pug this device into a core i7 or an older single channel DDR machine, the interface memory mapping does not work any more. As if the register map with in the device does no longer exsists. However, "lspci" utility provides correct information. I am not sure if this has anything to do with the number of DDR memory channels the motherboard has or why that would be a problem for PCI express device. However, this seem to be the common link between the machines that demonstrate this issue.

Could some one please let me know if you have ever experience this kind of problem before and/or any ideas to fix this problem?

Thank you very much,

Regards,

Sanka



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Re: PCIe interface memory memory mapping issue

[Robert Hancock]

On 06/12/2009 06:23 AM, Sanka Piyaratna wrote:
> Hi,
>
> I have developed a PCI express interface using Xilinx ML555 hardware module. I have implemented Linux kernel mode device drivers and everything works correctly as long as I am using the device within a computer with dual channel DDR arrangement. However, as soon as I pug this device into a core i7 or an older single channel DDR machine, the interface memory mapping does not work any more. As if the register map with in the device does no longer exsists. However, "lspci" utility provides correct information. I am not sure if this has anything to do with the number of DDR memory channels the motherboard has or why that would be a problem for PCI express device. However, this seem to be the common link between the machines that demonstrate this issue.

You'll have to give more details on what you mean by "the interface 
memory mapping does not work any more. As if the register map with in 
the device does no longer exsists".

Re: PCIe interface memory memory mapping issue

[Sanka Piyaratna]

Hi Robert


Thanks for your reply.

>> I have developed a PCI express interface using Xilinx ML555 hardware module. I have implemented Linux kernel >>mode device drivers and everything works correctly as long as I am using the device within a computer with dual >>channel DDR arrangement. However, as soon as I pug this device into a core i7 or an older single channel DDR >>machine, the interface memory mapping does not work any more. As if the register map with in the device does no >>longer exsists. However, "lspci" utility provides correct information. I am not sure if this has anything to do with the >>number of DDR memory channels the motherboard has or why that would be a problem for PCI express device. >>However, this seem to be the common link between the machines that demonstrate this issue.

>You'll have to give more details on what you mean by "the interface memory mapping does not work any more. As if >the register map with in the device does no longer exsists".

What I mean by this is that, when load the driver, the memory mapping of the hardware memory onto the computer memory does not work. I have a setup where I have all the control registers in BAR5 (512 byte) and I also have 64kB chuck of the FPGA memory mapped using BAR0. I am not able to see the register space when the BAR5 area in the computer memory map. However, I am able to write something to BAR0 memory map and read it back.

Thanks and regards,

Sanka



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Re: PCIe interface memory memory mapping issue

[Robert Hancock]

On Sun, Jun 14, 2009 at 6:43 AM, Sanka Piyaratna<cesanka@yahoo.com> wrote:
>
> Hi Robert
>
>
> Thanks for your reply.
>
>>> I have developed a PCI express interface using Xilinx ML555 hardware module. I have implemented Linux kernel >>mode device drivers and everything works correctly as long as I am using the device within a computer with dual >>channel DDR arrangement. However, as soon as I pug this device into a core i7 or an older single channel DDR >>machine, the interface memory mapping does not work any more. As if the register map with in the device does no >>longer exsists. However, "lspci" utility provides correct information. I am not sure if this has anything to do with the >>number of DDR memory channels the motherboard has or why that would be a problem for PCI express device. >>However, this seem to be the common link between the machines that demonstrate this issue.
>
>>You'll have to give more details on what you mean by "the interface memory mapping does not work any more. As if >the register map with in the device does no longer exsists".
>
> What I mean by this is that, when load the driver, the memory mapping of the hardware memory onto the computer memory does not work. I have a setup where I have all the control registers in BAR5 (512 byte) and I also have 64kB chuck of the FPGA memory mapped using BAR0. I am not able to see the register space when the BAR5 area in the computer memory map. However, I am able to write something to BAR0 memory map and read it back.

How are you getting the register space into the memory map.. ioremap() ?

Re: PCIe interface memory memory mapping issue

[Sanka Piyaratna]

>>>> I have developed a PCI express interface using Xilinx ML555 hardware module. I have implemented Linux kernel >>mode device drivers and everything works correctly as long as I am using the device within a computer with dual >>channel DDR arrangement. However, as soon as I pug this device into a core i7 or an older single channel DDR >>machine, the interface memory mapping does not work any more. As if the register map with in the device does no >>longer exsists. However, "lspci" utility provides correct information. I am not sure if this has anything to do with the >>number of DDR memory channels the motherboard has or why that would be a problem for PCI express device. >>However, this seem to be the common link between the machines that demonstrate this issue.
>>
>>>You'll have to give more details on what you mean by "the interface memory mapping does not work any more. As if >the register map with in the device does no longer exsists".
>>
>> What I mean by this is that, when load the driver, the memory mapping of the hardware memory onto the computer memory does not work. I have a setup where I have all the control registers in BAR5 (512 byte) and I also have 64kB chuck of the FPGA memory mapped using BAR0. I am not able to see the register space when the BAR5 area in the computer memory map. However, I am able to write something to BAR0 memory map and read it back.

>How are you getting the register space into the memory map.. ioremap() ?

that's right! I am using  ioremap(address, size). 



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