Re: APIC: enable workaround on AMD Fam10h CPUs

[Mark Hounschell <markh@compro.net>]

Borislav Petkov wrote:
> From: Borislav Petkov <borislav.petkov@amd.com>
> Date: Tue, 3 Feb 2009 16:24:22 +0100
> Subject: [PATCH] APIC: enable workaround on AMD Fam10h CPUs
> 
> Impact: fix to enable APIC for AMD Fam10h on chipsets with a missing/b0rked
> 	ACPI MP table (MADT)
> 
> Booting a 32bit kernel on an AMD Fam10h CPU running on chipsets with
> missing/b0rked MP table leads to a hang pretty early in the boot process
> due to the APIC not being initialized. Fix that by falling back to the
> default APIC base address in 32bit code, as it is done in the 64bit
> codepath.
> 
> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
> ---
>  arch/x86/kernel/apic.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
> index 4b6df24..115449f 100644
> --- a/arch/x86/kernel/apic.c
> +++ b/arch/x86/kernel/apic.c
> @@ -1436,7 +1436,7 @@ static int __init detect_init_APIC(void)
>  	switch (boot_cpu_data.x86_vendor) {
>  	case X86_VENDOR_AMD:
>  		if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model > 1) ||
> -		    (boot_cpu_data.x86 == 15))
> +		    (boot_cpu_data.x86 >= 15))
>  			break;
>  		goto no_apic;
>  	case X86_VENDOR_INTEL:

Hi Borislav,

Could this have anything to do with my Phenom-II problem that you've been so kind
to help me with?

Thanks
Mark