Re: [PATCH v3 0/6] ATS capability support for Intel IOMMU

["Zhao, Yu" <yu.zhao@intel.com>]

Jesse Barnes wrote:
> On Thu, 12 Feb 2009 20:50:32 +0800
> Yu Zhao <yu.zhao@intel.com> wrote:
> 
>> This patch series implements Address Translation Service support for
>> the Intel IOMMU. ATS makes the PCI Endpoint be able to request the
>> DMA address translation from the IOMMU and cache the translation in
>> the Endpoint, thus alleviate IOMMU pressure and improve the hardware
>> performance in the I/O virtualization environment.
>>
>>
>> Changelog: v2 -> v3
>>   1, throw error message if VT-d hardware detects invalid descriptor
>>      on Queued Invalidation interface (David Woodhouse)
>>   2, avoid using pci_find_ext_capability every time when reading ATS
>>      Invalidate Queue Depth (Matthew Wilcox)
>> Changelog: v1 -> v2
>>   added 'static' prefix to a local LIST_HEAD (Andrew Morton)
>>
>>
>> Yu Zhao (6):
>>   PCI: support the ATS capability
>>   VT-d: parse ATSR in DMA Remapping Reporting Structure
>>   VT-d: add queue invalidation fault status support
>>   VT-d: add device IOTLB invalidation support
>>   VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps
>>   VT-d: support the device IOTLB
> 
> Um nevermind, this should go through the IOMMU tree (David?).

If it's possible, I'd like it go through the PCI tree because the ATS 
depends on the SR-IOV. This dependency is not reflected in this v3 
series since the SR-IOV is not in-tree and I don't want to break the 
build after people apply the ATS on their tree.

So Dave, can I get an ack from you and let Jesse pull the IOMMU change 
to his tree? Or let this ATS go to 2.6.31?

Thanks,
Yu