From: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
To: Matthew Wilcox <matthew@wil.cx>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>,
"David S. Miller" <davem@davemloft.net>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI MSI: Yet another fix for MSI-X with NIU cards, v2
Date: Wed, 13 May 2009 14:06:30 +0900 [thread overview]
Message-ID: <4A0A5556.9050209@jp.fujitsu.com> (raw)
In-Reply-To: <4A0A5284.1000705@jp.fujitsu.com>
Hi David and all,
Sorry, if you have problem with wrong diffstat in patch header
(it was because I hand-fixed the comment in patch), please use
following instead. Contents are not changed, still v2.
Thanks,
H.Seto
The NIU device refuses to allow accesses to MSI-X registers before MSI-X
is enabled. This patch fixes the problem by moving the read & write the
mask register (for preserved bits) to after MSI-X is enabled.
Reported-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
---
drivers/pci/msi.c | 21 ++++++++++++++++++---
1 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 6f2e629..44085e0 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -455,9 +455,7 @@ static int msix_capability_init(struct pci_dev *dev,
entry->msi_attrib.default_irq = dev->irq;
entry->msi_attrib.pos = pos;
entry->mask_base = base;
- entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE +
- PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
- msix_mask_irq(entry, 1);
+ entry->masked = 1;
list_add_tail(&entry->list, &dev->msi_list);
}
@@ -493,6 +491,23 @@ static int msix_capability_init(struct pci_dev *dev,
msix_set_enable(dev, 1);
dev->msix_enabled = 1;
+ /*
+ * The states of Reserved bits[31:01] of Vector Control for MSI-X
+ * Table Entries must be 0. However, for potential future use,
+ * software must preserve the value of these reserved bits.
+ * Refer PCI spec 3.0, 6.8.2.9.
+ *
+ * Note that there are some device that refuses access to MSI-X
+ * Table Entries before MSI-X is enabled. Therefore we do it here.
+ */
+ list_for_each_entry(entry, &dev->msi_list, list) {
+ int vector = entry->msi_attrib.entry_nr;
+ entry->masked = readl(base + vector * PCI_MSIX_ENTRY_SIZE +
+ PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
+ /* Make sure it is masked */
+ msix_mask_irq(entry, 1);
+ }
+
return 0;
}
--
1.6.3
next prev parent reply other threads:[~2009-05-13 5:07 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-05-08 13:13 [PATCH] Fix MSI-X with NIU cards Matthew Wilcox
2009-05-11 1:21 ` Michael Ellerman
2009-05-11 5:36 ` David Miller
2009-05-11 14:30 ` Michael Ellerman
2009-05-11 23:40 ` David Miller
2009-05-11 23:59 ` Jesse Barnes
2009-05-12 2:21 ` Michael Ellerman
2009-05-13 10:07 ` Matthew Wilcox
2009-05-13 4:06 ` Hidetoshi Seto
2009-05-13 4:40 ` Hidetoshi Seto
2009-05-13 4:49 ` Michael Ellerman
2009-05-13 4:10 ` [PATCH] PCI MSI: Yet another fix for " Hidetoshi Seto
2009-05-13 5:13 ` David Miller
2009-05-13 4:54 ` [PATCH] PCI MSI: Yet another fix for MSI-X with NIU cards, v2 Hidetoshi Seto
2009-05-13 5:06 ` Hidetoshi Seto [this message]
2009-05-13 6:31 ` Michael Ellerman
2009-05-13 18:43 ` Matthew Wilcox
2009-05-14 6:22 ` Hidetoshi Seto
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