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From: David Daney <ddaney@caviumnetworks.com>
To: prasad@linux.vnet.ibm.com
Cc: Ingo Molnar <mingo@elte.hu>,
	Frederic Weisbecker <fweisbec@gmail.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Alan Stern <stern@rowland.harvard.edu>,
	Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [Patch 01/12] Prepare the code for Hardware Breakpoint	interfaces
Date: Tue, 26 May 2009 18:40:16 -0700	[thread overview]
Message-ID: <4A1C9A00.2030303@caviumnetworks.com> (raw)
In-Reply-To: <20090522061827.GA9611@in.ibm.com>

K.Prasad wrote:
> On Thu, May 21, 2009 at 09:16:38AM -0700, David Daney wrote:
>> K.Prasad wrote:
>> [...]
>>> +struct hw_breakpoint {
>>> +	void (*triggered)(struct hw_breakpoint *, struct pt_regs *);
>>> +	struct arch_hw_breakpoint info;
>>> +};
>>> +/*
>>> + * len and type values are defined in include/asm/hw_breakpoint.h.
>>> + * Available values vary according to the architecture.  On i386 the
>>> + * possibilities are:
>>> + *
>>> + *	HW_BREAKPOINT_LEN_1
>>> + *	HW_BREAKPOINT_LEN_2
>>> + *	HW_BREAKPOINT_LEN_4
>>> + *	HW_BREAKPOINT_RW
>>> + *	HW_BREAKPOINT_READ
>>> + *
>>> + * On other architectures HW_BREAKPOINT_LEN_8 may be available, and the
>>> + * 1-, 2-, and 4-byte lengths may be unavailable.  There also may be
>>> + * HW_BREAKPOINT_WRITE.  You can use #ifdef to check at compile time.
>>> + */
>>> +
>> I question weather having all these symbols for lengths is the proper  
>> approach.
>>
>> On mips we would currently have:
>>
>> HW_BREAKPOINT_LEN_8
>> HW_BREAKPOINT_LEN_16
>> HW_BREAKPOINT_LEN_32
>> HW_BREAKPOINT_LEN_64
>> HW_BREAKPOINT_LEN_128
>> HW_BREAKPOINT_LEN_256
>> HW_BREAKPOINT_LEN_512
>> HW_BREAKPOINT_LEN_1024
>> HW_BREAKPOINT_LEN_2048
>>
>> If we were to use a debug agent hooked into the MIPS EJTAG debugger
>> support registers, 63 different even powers of 2 are valid lengths.
>>
>> Determining the range of allowed breakpoint lengths, converting back
>> and forth between numeric values that are likely to be used in a
>> debugger, and these symbolic values that the proposed kernel interface
>> would use, could be a little ugly.
>>
>> Have you thought about passing just the raw length?  And perhaps
>> having:
>>
>> HW_BREAKPOINT_LEN_MASK that would have a bit set for each log2 of a
>> legal length?
>>
> 
> As explained to you here: http://lkml.org/lkml/2008/12/16/553/, defining
> every possible length of the HW Breakpoint works for x86, but may not be
> suitable for MIPS.
> 

Sorry, I missed it the first time.

> As you might have seen, the HW_BREAKPOINT_LEN_* values are defined in
> x86-specific files and will be compared against 'len' field in
> arch-specific 'struct arch_hw_breakpoint', for the reason that these
> attributes are not valid for all architectures and have to be defined
> for each processor in their own way.
> 

But the comment mentioning all of this is in a generic non-architecture 
specific file.  I do see where it says '...On i386...', so that does 
clarify it somewhat.  Adding something similar to your following 
explanation ...:

> Defining a HW_BREAKPOINT_LEN_MASK mask and validation of the input
> length to check if it is a valid power of 2 can still be done for MIPS
> in the arch-specific files and I don't see any part of the generic
> interface being a hurdle during its implementation. Let me know if you
> think there's any.

... might be worthwhile.

Thanks,
David Daney


  reply	other threads:[~2009-05-27  1:40 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20090521095613.834622717@prasadkr_t60p.in.ibm.com>
2009-05-21 14:00 ` [Patch 01/12] Prepare the code for Hardware Breakpoint interfaces K.Prasad
2009-05-21 16:16   ` David Daney
2009-05-22  6:18     ` K.Prasad
2009-05-27  1:40       ` David Daney [this message]
2009-05-27  1:01   ` Frederic Weisbecker
2009-05-27  8:49     ` K.Prasad
2009-05-27 11:48       ` Frederic Weisbecker
2009-05-27 14:21         ` K.Prasad
2009-05-27 15:40           ` Frederic Weisbecker
2009-05-27 14:13   ` K.Prasad
2009-05-21 14:01 ` [Patch 02/12] Introducing generic hardware breakpoint handler interfaces K.Prasad
2009-05-21 14:01 ` [Patch 03/12] x86 architecture implementation of Hardware Breakpoint interfaces K.Prasad
2009-05-21 14:01 ` [Patch 04/12] Modifying generic debug exception to use thread-specific debug registers K.Prasad
2009-05-21 14:02 ` [Patch 05/12] Use wrapper routines around debug registers in processor related functions K.Prasad
2009-05-21 14:02 ` [Patch 06/12] Use the new wrapper routines to access debug registers in process/thread code K.Prasad
2009-05-21 14:02 ` [Patch 07/12] Modify signal handling code to refrain from re-enabling HW Breakpoints K.Prasad
2009-05-21 14:02 ` [Patch 08/12] Modify Ptrace routines to access breakpoint registers K.Prasad
2009-05-27  0:07   ` Frederic Weisbecker
2009-05-27  8:45     ` K.Prasad
2009-05-27 14:15   ` K.Prasad
2009-05-21 14:02 ` [Patch 09/12] Cleanup HW Breakpoint registers before kexec K.Prasad
2009-05-21 14:02 ` [Patch 10/12] Sample HW breakpoint over kernel data address K.Prasad
2009-05-21 14:03 ` [Patch 11/12] ftrace plugin for kernel symbol tracing using HW Breakpoint interfaces - v6 K.Prasad
2009-05-21 14:03 ` [Patch 12/12] Reset bits in dr6 after the corresponding exception is handled K.Prasad
     [not found] <20090601180605.799735829@prasadkr_t60p.in.ibm.com>
2009-06-01 18:13 ` [Patch 01/12] Prepare the code for Hardware Breakpoint interfaces K.Prasad
     [not found] <20090530103857.715014561@prasadkr_t60p.in.ibm.com>
2009-05-30 10:48 ` K.Prasad
     [not found] <20090515105133.629980476@prasadkr_t60p.in.ibm.com>
2009-05-15 10:55 ` K.Prasad
2009-05-16  0:24 ` K.Prasad
     [not found] <20090513160546.592373797@prasadkr_t60p.in.ibm.com>
2009-05-13 16:12 ` K.Prasad
     [not found] <20090511114422.133566343@prasadkr_t60p.in.ibm.com>
2009-05-11 11:52 ` K.Prasad
2009-05-28  5:28   ` David Gibson
2009-05-28 11:10     ` K.Prasad
     [not found] <20090424055710.764502564@prasadkr_t60p.in.ibm.com>
2009-04-24  6:14 ` K.Prasad

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