Re: [PATCH 2/2] perf_counter: powerpc: Implement generalized cache events for POWER processors

Ingo Molnar
2009-06-12T12:12:21Z

* Paul Mackerras <paulus@samba.org> wrote:

> > I dont know whether we should do such combo counters in the
> > kernel itself - i'm slightly against that notion. (seems
> > complex)
>
> Yeah.
>
> When thinking about having "composite" events, i.e. a counter
> whose value is computed from two or more hardware counters, I
> couldn't see how to do sampling in the general case. It's easy if
> we're just adding multiple counters, but sampling when subtracting
> counters is hard. For example, if you want to sample every N
> cache hits, and you're computing hits as accesses - misses, I
> couldn't see a decent way to know when to take the sample, not
> without having to take an interrupt on every access in some
> circumstances.

We now have a period field - and that could be negative and be
subtracted by the profiler automatically.

It's still statistical and a given instruction can go 'negative'
sporadically, but in terms of total function averages and for any
high-traffic place it's still pretty expressive IMO.

Ingo