Re: PowerPC PCI DMA issues (prefetch/coherency?)

Scott Wood
2009-06-16T16:21:24Z

On Tue, Jun 16, 2009 at 02:58:27PM +0100, Chris Pringle wrote:
> We're developing on a Freescale MPC8272 and are having some nasty
> problems with PCI bus mastering and data corruption.

What kernel version? What firmware? Custom board, or one in upstream
(which one)?

> We have some custom hardware that is bus mastering, reading data from
> the CPUs memory for it's own use. Most of the time, the data is correct,
> however occasionally we are seeing data that appears to be from
> somewhere else in memory (usually memory that has already been read by
> the PCI device). The problem looks like stale data on the PCI bridge
> prefetch buffers or a cache coherency problem, but we've been unable to
> come up with a solution to our problem. It is my understanding that it
> shouldn't be a cache coherency problem as the CPU cache should be
> snooped as the data is read from memory. Even if it were an issue, the
> pci_map_sg* functions should have sorted out any cache coherency issues
> before the DMA operation started.

Cache coherency on PCI DMA requires that the memory be mapped with the M
attribute on this chip, but that should be happening based on detection of
the core.

Also make sure that you park the bus on PCI and raise its arbitration
priority, as done at the end of fixup_pci in arch/powerpc/boot/cuboot-pq2.c.

BTW, you may want to post to linuxppc-dev@lists.ozlabs.org for
powerpc-specific issues, especially this kind of hardware issue.

-Scott