From: Jiri Slaby <jirislaby@gmail.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Pekka Paalanen <pq@iki.fi>,
linux-kernel@vger.kernel.org,
Christoph Hellwig <hch@infradead.org>,
lethal@linux-sh.org, linux-sh@vger.kernel.org
Subject: Re: Do cpu-endian MMIO accessors exist?
Date: Wed, 22 Jul 2009 09:24:29 +0200 [thread overview]
Message-ID: <4A66BEAD.3080404@gmail.com> (raw)
In-Reply-To: <200907220005.27583.arnd@arndb.de>
On 07/22/2009 12:05 AM, Arnd Bergmann wrote:
> On Tuesday 21 July 2009, Jiri Slaby wrote:
>> I guess it's a bug that ioread/write* on sh are not with
>> barriers?
>
> That depends on how that architecture defines its bus interface.
> On many simple architectures, you do not need any synchronization
> operations.
No, I should have written this explicitly. I meant read* have a barrier,
whereas ioread* do not. Similarly for writes. Is this expected?
For example:
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; })
#define ioread32(a) __raw_readl(a)
next prev parent reply other threads:[~2009-07-22 7:24 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-07-21 20:42 Do cpu-endian MMIO accessors exist? Pekka Paalanen
2009-07-21 20:59 ` Jiri Slaby
2009-07-21 21:15 ` Arnd Bergmann
2009-07-21 21:33 ` Christoph Hellwig
2009-07-21 22:01 ` Arnd Bergmann
2009-07-22 17:11 ` Pekka Paalanen
2009-07-22 21:19 ` Arnd Bergmann
2009-07-23 16:23 ` Pekka Paalanen
2009-07-22 21:20 ` Arnd Bergmann
2009-07-21 21:56 ` Jiri Slaby
2009-07-21 22:05 ` Arnd Bergmann
2009-07-22 7:24 ` Jiri Slaby [this message]
2009-07-22 8:35 ` Arnd Bergmann
2009-07-22 8:43 ` Alan Cox
2009-07-22 13:44 ` Arnd Bergmann
2009-07-27 5:00 ` Paul Mundt
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