X86_FEATURE_LAHF_LM set incorrectly (likely due to BIOS bug)

[Kevin Winchester <kjwinchester@gmail.com>]

Hi,

I have an AMD Athlon64 processor:

processor	: 0
vendor_id	: AuthenticAMD
cpu family	: 15
model		: 4
model name	: AMD Athlon(tm) 64 Processor 2800+
stepping	: 10
cpu MHz		: 1800.000
cache size	: 512 KB
fpu		: yes
fpu_exception	: yes
cpuid level	: 1
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx mmxext lm 3dnowext 3dnow rep_good lahf_lm
bogomips	: 3600.25
TLB size	: 1024 4K pages
clflush size	: 64
cache_alignment	: 64
address sizes	: 40 bits physical, 48 bits virtual
power management: ts fid vid ttp

As you can see, the lahf_lm feature is reported as being present,
but the lahf/sahf instructions are not actually supported by this
processor.  A simple program:

int main() {
	asm("lahf");
}


results in:

$ ./a.out
Illegal instruction

I think the problem is with my BIOS, because, in the following guide
from AMD:

http://support.amd.com/us/Processor_TechDocs/25759.pdf

Erratum 110 indicates that some CPUs will not report the LAHF
capability, even if they have it, and the BIOS should write to a
specific MSR bit in order to get the feature reported as present (for
processors that support LAHF).  I believe that perhaps my BIOS is
writing to that bit unconditionally, and this causes my CPU to report
support for the feature.

If I am correct, would it be appropriate to add a check somewhere in
the CPU feature code to detect early Athlon 64 processors like mine
and clear that feature flag, in case other BIOSes have made the same
mistake?  If so, is there some kind of quirk mechanism for this, or
should I prepare a patch that adds the check directly to the feature
checking code?

Thanks,

-- 
Kevin Winchester