Re: [tip:x86/asm] x86/i386: Make sure stack-protector segment base is cache aligned

H. Peter Anvin
2009-09-04T03:40:20Z

On 09/03/2009 07:59 PM, Tejun Heo wrote:
>
> Another question. Other than saving and loading an extra segment
> register on kernel entry/exit, whether using the same or different
> segment registers doesn't look like would make difference
> performance-wise. If I'm interpreting the wording in the optimization
> manual correctly, it means that each non-zero segment based memory
> access will be costly regardless of which specific segment register is
> in use and there's no way we can merge segment based dereferences for
> stackprotector and percpu variables.
>

It's correct that it doesn't make any difference for access, only for load.

-hpa

--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.