From: "H. Peter Anvin" <hpa@zytor.com>
To: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
"ebiederm@xmission.com" <ebiederm@xmission.com>,
Yinghai Lu <yinghai@kernel.org>,
"Maciej W. Rozycki" <macro@linux-mips.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [patch] x86, apic: use 0x20 for the IRQ_MOVE_CLEANUP_VECTOR instead of 0x1f
Date: Fri, 08 Jan 2010 18:19:21 -0800 [thread overview]
Message-ID: <4B47E7A9.6090904@zytor.com> (raw)
In-Reply-To: <1263002989.2879.664.camel@sbs-t61.sc.intel.com>
On 01/08/2010 06:09 PM, Suresh Siddha wrote:
>
> So change the IRQ_MOVE_CLEANUP_VECTOR to 0x20 and allow 0x21-0x2f to be used
> for device interrupts. 0x30-0x3f will be used for ISA interrupts (these
> also can be migrated in the context of IOAPIC and hence need to be at a higher
> priority level than IRQ_MOVE_CLEANUP_VECTOR).
>
You're referring to when they're accessed as IOAPIC interrupts as
opposed to ExtInt interrupts?
>
> -/*
> - * First APIC vector available to drivers: (vectors 0x30-0xee). We
> - * start allocating at 0x31 to spread out vectors evenly between
> - * priority levels. (0x80 is the syscall vector)
> - */
> -#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 1)
> -#define VECTOR_OFFSET_START 1
> -
> #define NR_VECTORS 256
>
> #define FPU_IRQ 13
> diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
> index d5bfa29..5c090a1 100644
> --- a/arch/x86/kernel/apic/io_apic.c
> +++ b/arch/x86/kernel/apic/io_apic.c
> @@ -1162,8 +1162,8 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
> * Also, we've got to be careful not to trash gate
> * 0x80, because int 0x80 is hm, kind of importantish. ;)
> */
> - static int current_vector = FIRST_DEVICE_VECTOR + VECTOR_OFFSET_START;
> - static int current_offset = VECTOR_OFFSET_START % 8;
> + static int current_vector = FIRST_DEVICE_VECTOR;
> + static int current_offset = 0;
> unsigned int old_vector;
> int cpu, err;
> cpumask_var_t tmp_mask;
>
I'm not entirely sure I like losing this bit, even though it isn't
really necessary with your changes (VECTOR_OFFSET_START would be 0).
I'm afraid we might end up with the same buglet being "reinvented" later.
However, my most serious concern with this patch is that there is a
fairly significant change due to this patch, which is that the legacy
IRQ vectors now fall *inside* the FIRST_DEVICE_VECTOR range. This isn't
a bad thing -- in fact, it is fundamentally the right thing to do
especially once we consider platforms which *don't* have the legacy IRQs
-- but it makes me scared of unexpected behavior changes as a result.
If you feel confident that that is not the case, could you outline why
it shouldn't be a problem?
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
next prev parent reply other threads:[~2010-01-09 2:29 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-09 2:09 [patch] x86, apic: use 0x20 for the IRQ_MOVE_CLEANUP_VECTOR instead of 0x1f Suresh Siddha
2010-01-09 2:19 ` H. Peter Anvin [this message]
2010-01-09 2:50 ` Yinghai Lu
2010-01-11 22:53 ` Suresh Siddha
2010-01-11 22:57 ` H. Peter Anvin
2010-01-11 23:10 ` Eric W. Biederman
2010-01-11 23:13 ` H. Peter Anvin
2010-01-12 0:06 ` Suresh Siddha
2010-01-12 0:13 ` H. Peter Anvin
2010-01-12 0:28 ` Eric W. Biederman
2010-01-12 0:36 ` H. Peter Anvin
2010-01-12 1:52 ` Eric W. Biederman
2010-01-12 2:17 ` H. Peter Anvin
2010-01-12 2:27 ` Eric W. Biederman
2010-01-12 10:25 ` Alan Cox
2010-01-13 20:36 ` Eric W. Biederman
2010-01-13 20:38 ` H. Peter Anvin
2010-01-13 20:53 ` H. Peter Anvin
2010-01-13 20:58 ` H. Peter Anvin
2010-01-12 0:42 ` H. Peter Anvin
2010-01-11 23:00 ` Eric W. Biederman
2010-01-11 23:07 ` H. Peter Anvin
2010-01-09 3:07 ` Yinghai Lu
2010-01-09 3:20 ` H. Peter Anvin
2010-01-09 3:23 ` H. Peter Anvin
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