From: Yinghai Lu <yinghai@kernel.org>
To: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>,
Ingo Molnar <mingo@elte.hu>,
Linus Torvalds <torvalds@linux-foundation.org>,
Ivan Kokshaysky <ink@jurassic.park.msu.ru>,
Alex Chiang <achiang@hp.com>,
Bjorn Helgaas <bjorn.helgaas@hp.com>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH 09/14] pci: introduce pci_assign_unassigned_bridge_resources
Date: Tue, 12 Jan 2010 17:58:07 -0800 [thread overview]
Message-ID: <4B4D28AF.1060506@kernel.org> (raw)
In-Reply-To: <4B4D18D9.1030609@jp.fujitsu.com>
On 01/12/2010 04:50 PM, Kenji Kaneshige wrote:
> Yinghai Lu wrote:
>> for pciehp to use it later
>>
>> pci_setup_bridge() will not check enabled for the slot bridge, otherwise
>> update res is not updated to bridge BAR. that is bridge is enabled already for
>> port service.
>>
>> -v2: update it with resource_list_x
>>
>> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
...
>> +
>> +void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
>> +{
>> + struct pci_bus *bus;
>> + struct pci_bus *parent = bridge->subordinate;
>> + int retval;
>> +
>> + pci_bus_size_bridges(parent);
>> + pci_clear_master(bridge);
>
> I have a concern about clearing bus master enable bit here, though
> I'm not sure about it. I'm wondering if clearing bus master enable
> bit might have some bad effect for the port services to work. For
> example, does MSI interrupt work without enabling bus mastering?
but we set that pci_set_master right away after we assign the new resource
>
>
>> + __pci_bridge_assign_resources(bridge, NULL);
>> + retval = pci_reenable_device(bridge);
>> + pci_set_master(bridge);
>> + pci_enable_bridges(parent);
YH
next prev parent reply other threads:[~2010-01-13 1:59 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-12-22 23:02 [PATCH 00/14] pci: update pci bridge resources Yinghai Lu
2009-12-22 23:02 ` [PATCH 01/14] pci: separate pci_setup_bridge to small functions Yinghai Lu
2010-01-15 18:54 ` Jesse Barnes
2009-12-22 23:02 ` [PATCH 02/14] resource: add release_child_resources Yinghai Lu
2010-01-15 18:54 ` Jesse Barnes
2009-12-22 23:02 ` [PATCH 03/14] pci: add pci_bridge_release_unused_res and pci_bus_release_unused_bridge_res Yinghai Lu
2010-01-15 18:53 ` Jesse Barnes
2010-01-16 0:20 ` Yinghai Lu
2009-12-22 23:02 ` [PATCH 04/14] pci: don't dump it when bus resource flags is not used Yinghai Lu
2010-01-15 18:54 ` Jesse Barnes
2009-12-22 23:02 ` [PATCH 05/14] pci: add failed_list to record failed one for pci_bus_assign_resources Yinghai Lu
2010-01-15 18:56 ` Jesse Barnes
2010-01-15 21:13 ` Yinghai Lu
2010-01-15 21:41 ` Bjorn Helgaas
2009-12-22 23:02 ` [PATCH 06/14] pci: reject mmio range start from 0 on pci_bridge read Yinghai Lu
2010-01-15 19:19 ` Jesse Barnes
2010-01-15 21:15 ` Yinghai Lu
2009-12-22 23:02 ` [PATCH 07/14] pci: don't shrink bridge resources Yinghai Lu
2010-01-15 19:04 ` Jesse Barnes
2010-01-15 21:09 ` Yinghai Lu
2010-01-15 21:31 ` Jesse Barnes
2010-01-16 0:32 ` Yinghai Lu
2009-12-22 23:02 ` [PATCH 08/14] pci: update bridge res to get more big range in pci assign unssign Yinghai Lu
2010-01-15 19:12 ` Jesse Barnes
2010-01-15 21:12 ` Yinghai Lu
2010-01-15 21:34 ` Bjorn Helgaas
2010-01-15 21:34 ` Jesse Barnes
2009-12-22 23:02 ` [PATCH 09/14] pci: introduce pci_assign_unassigned_bridge_resources Yinghai Lu
2010-01-13 0:50 ` Kenji Kaneshige
2010-01-13 1:58 ` Yinghai Lu [this message]
2010-01-13 7:31 ` Kenji Kaneshige
2010-01-13 7:52 ` Yinghai Lu
2009-12-22 23:02 ` [PATCH 10/14] pci: pciehp clean flow in pciehp_configure_device Yinghai Lu
2010-01-15 19:14 ` Jesse Barnes
2010-01-15 21:14 ` Yinghai Lu
2009-12-22 23:02 ` [PATCH 11/14] pci: pciehp second try to get big range for pcie devices Yinghai Lu
2009-12-22 23:02 ` [PATCH 12/14] pci: pci_bridge_release_res Yinghai Lu
2009-12-22 23:02 ` [PATCH 13/14] pciehp: add support for bridge resource reallocation Yinghai Lu
2009-12-22 23:02 ` [PATCH 14/14] pci: set PCI_PREF_RANGE_TYPE_64 in pci_bridge_check_ranges Yinghai Lu
2010-01-08 21:33 ` [PATCH 00/14] pci: update pci bridge resources Patrick Keller
2010-01-11 21:57 ` Patrick Keller
2010-01-12 18:18 ` Jesse Barnes
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4B4D28AF.1060506@kernel.org \
--to=yinghai@kernel.org \
--cc=achiang@hp.com \
--cc=bjorn.helgaas@hp.com \
--cc=ink@jurassic.park.msu.ru \
--cc=jbarnes@virtuousgeek.org \
--cc=kaneshige.kenji@jp.fujitsu.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=torvalds@linux-foundation.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox