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From: "H. Peter Anvin" <hpa@zytor.com>
To: Borislav Petkov <bp@amd64.org>
Cc: mingo@elte.hu, tglx@linutronix.de, andreas.herrmann3@amd.com,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] x86, cacheinfo: Fix disabling of L3 cache indexes
Date: Wed, 20 Jan 2010 15:04:46 -0800	[thread overview]
Message-ID: <4B578C0E.5090709@zytor.com> (raw)
In-Reply-To: <1263899279-30739-2-git-send-email-bp@amd64.org>

On 01/19/2010 03:07 AM, Borislav Petkov wrote:
>  
> +static void __wbinvd(void *dummy)
> +{
> +	asm volatile("wbinvd" : : : "memory");
> +}
> +

[...]

> +	smp_call_function_single(cpu, __wbinvd, NULL, 1);

I really don't like this combination.

First of all, it's an asm version of an instruction we already have
macros for.  This should probably just be wbinvd(), or *possibly*
native_wbinvd(), although that would have to be justified -- especially
since the preexisting code used wbinvd().

Second, it's pretty obvious that the only reason for this function at
all is to provide a wrapper that can be passed to smp_call_function*().
 It would be a lot cleaner to have a small function wbinvd_on_cpu(cpu)
as a wrapper for the higher-order functionality.

	-hpa

  reply	other threads:[~2010-01-20 23:06 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-01-19 11:07 [PATCH 0/3] x86, cacheinfo, amd: L3 Cache Index Disable fixes Borislav Petkov
2010-01-19 11:07 ` [PATCH 1/3] x86, cacheinfo: Fix disabling of L3 cache indexes Borislav Petkov
2010-01-20 23:04   ` H. Peter Anvin [this message]
2010-01-21 16:30     ` Borislav Petkov
2010-01-21 18:21       ` H. Peter Anvin
2010-01-19 11:07 ` [PATCH 2/3] x86, cacheinfo: Add cache index disable sysfs attrs only to L3 caches Borislav Petkov
2010-01-19 11:07 ` [PATCH 3/3] x86, cacheinfo: Calculate L3 indexes Borislav Petkov
2010-01-20 23:15   ` H. Peter Anvin
2010-01-21 16:31     ` Borislav Petkov

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