From: Yinghai Lu <yinghai@kernel.org>
To: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Ingo Molnar <mingo@elte.hu>, "H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
"Eric W. Biederman" <ebiederm@xmission.com>
Subject: Re: [patch] x86: handle legacy PIC interrupts on all the cpu's
Date: Mon, 15 Mar 2010 15:15:33 -0700 [thread overview]
Message-ID: <4B9EB185.3010400@kernel.org> (raw)
In-Reply-To: <1268693771.3296.49.camel@sbs-t61.sc.intel.com>
On 03/15/2010 03:56 PM, Suresh Siddha wrote:
> On Mon, 2010-03-15 at 14:51 -0700, Yinghai Lu wrote:
>>> + for (irq = 0; irq < legacy_pic->nr_legacy_irqs; irq++)
>>> + if (!IO_APIC_IRQ(irq))
>>> + per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq;
>>
>> seems those three lines are not needed...
>
> Those are needed for !CONFIG_X86_IO_APIC case.
>
then we can have
+#ifndef CONFIG_X86_IO_APIC
+ for (irq = 0; irq < legacy_pic->nr_legacy_irqs; irq++)
+ per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq;
+#endif
then we don't punish most setup with ioapic controller.
Yinghai
next prev parent reply other threads:[~2010-03-15 22:16 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-03-15 22:33 [patch] x86: handle legacy PIC interrupts on all the cpu's Suresh Siddha
2010-03-15 21:51 ` Yinghai Lu
2010-03-15 22:56 ` Suresh Siddha
2010-03-15 22:15 ` Yinghai Lu [this message]
2010-03-16 5:37 ` Ingo Molnar
2010-03-16 5:57 ` Ingo Molnar
2010-03-16 6:54 ` Suresh Siddha
2010-03-16 6:35 ` Yinghai Lu
2010-03-16 7:29 ` Ingo Molnar
2010-03-16 6:00 ` [tip:x86/urgent] x86: Handle " tip-bot for Suresh Siddha
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