Re: [PATCH] x86: mce: Xeon75xx specific interface to get corrected memory error information v2

[Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>]

(2010/03/29 16:47), Andi Kleen wrote:
> Andi Kleen <andi@firstfloor.org> writes:
> 
>> x86: mce: Xeon75xx specific interface to get corrected memory error information v2
> 
> Ping?  Please review this patch. Thanks.
> -Andi
> 
>>
>> [This version addresses the previous comments. It does not change
>> any interface to the outside and does not attempt to encode DIMMs
>> or anything like that, but only passes out the physical address of u
>> a corrected error in the standard ADDR register field. 
>> So for the outside it looks exactly the same as if the CPU supported this 
>> natively, but no otherwise special interfaces.
>>
>> I hope this addresses previous concerns. I guess the DIMM error reporting
>> can be revisited once there's a new reporting interface. There are still
>> some traces of DIMM parsing in there, but it's only used for debug
>> purposes now.]
>>
>> ---
>>
>> Xeon 75xx doesn't log physical addresses on corrected machine check
>> events in the standard architectural MSRs. Instead the address has to
>> be retrieved in a model specific way. This makes it impossible
>> to do predictive failure analysis.

Could you point proper specification or datasheet to know/check what
you are going to do here?


Thanks,
H.Seto