public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
* [RFC] KVM MMU: thinking of shadow page cache
@ 2010-03-30  1:59 Xiao Guangrong
  2010-03-30 13:32 ` Avi Kivity
  0 siblings, 1 reply; 4+ messages in thread
From: Xiao Guangrong @ 2010-03-30  1:59 UTC (permalink / raw)
  To: Avi Kivity; +Cc: Ingo Molnar, Marcelo Tosatti, Sheng Yang, KVM list, LKML

When we cached shadow page tables, one guest page table may have
many shadow pages, take below case for example:

 (RO+U) ---> |------| __     |------|
 (W+U ) ---> |  GP1 |   |    |  GP2 |
 (W+P ) ---> |------|   |--> |------|

There have 3 kinds of permission mapping to GP1, so we should
allocate 3 shadow pages for GP1 and 3 shadow pages for GP2.
And it has 3 class permissions(R/W, U/S, X/NX) in x86's architecture,
for the worst case, we should allocate 2^3 pages for every paging
mapping level.

This waste is caused by that we only set the permission bits in PTE,
not in the middle mapping level.

So, i think we can mapping guest page table's permission into cache
shadow page table, then it can be shared between many shadow page tables
if their map to the same gust physics address. For above case, we only need 2
pages.

Any comments?

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [RFC] KVM MMU: thinking of shadow page cache
  2010-03-30  1:59 [RFC] KVM MMU: thinking of shadow page cache Xiao Guangrong
@ 2010-03-30 13:32 ` Avi Kivity
  2010-04-01  9:05   ` Xiao Guangrong
  0 siblings, 1 reply; 4+ messages in thread
From: Avi Kivity @ 2010-03-30 13:32 UTC (permalink / raw)
  To: Xiao Guangrong; +Cc: Ingo Molnar, Marcelo Tosatti, Sheng Yang, KVM list, LKML

On 03/30/2010 04:59 AM, Xiao Guangrong wrote:
> When we cached shadow page tables, one guest page table may have
> many shadow pages, take below case for example:
>
>   (RO+U) --->  |------| __     |------|
>   (W+U ) --->  |  GP1 |   |    |  GP2 |
>   (W+P ) --->  |------|   |-->  |------|
>
> There have 3 kinds of permission mapping to GP1, so we should
> allocate 3 shadow pages for GP1 and 3 shadow pages for GP2.
> And it has 3 class permissions(R/W, U/S, X/NX) in x86's architecture,
> for the worst case, we should allocate 2^3 pages for every paging
> mapping level.
>
> This waste is caused by that we only set the permission bits in PTE,
> not in the middle mapping level.
>
> So, i think we can mapping guest page table's permission into cache
> shadow page table, then it can be shared between many shadow page tables
> if their map to the same gust physics address. For above case, we only need 2
> pages.
>
> Any comments?
>    

We've considered this in the past, it makes sense.  The big question is 
whether any guests actually map the same page table through PDEs with 
different permissions (mapping the same page table through multiple PDEs 
is very common, but always with the same permissions).  Do you know of 
any such guest?

-- 
Do not meddle in the internals of kernels, for they are subtle and quick to panic.


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [RFC] KVM MMU: thinking of shadow page cache
  2010-03-30 13:32 ` Avi Kivity
@ 2010-04-01  9:05   ` Xiao Guangrong
  2010-04-01  9:12     ` Avi Kivity
  0 siblings, 1 reply; 4+ messages in thread
From: Xiao Guangrong @ 2010-04-01  9:05 UTC (permalink / raw)
  To: Avi Kivity; +Cc: Ingo Molnar, Marcelo Tosatti, Sheng Yang, KVM list, LKML



Avi Kivity wrote:

>>    
> 
> We've considered this in the past, it makes sense.  The big question is
> whether any guests actually map the same page table through PDEs with
> different permissions (mapping the same page table through multiple PDEs
> is very common, but always with the same permissions).  Do you know of
> any such guest?

I also don't know whether have such guest.
Maybe my idea is no good for current OS, thanks for your comments.

Xiao

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [RFC] KVM MMU: thinking of shadow page cache
  2010-04-01  9:05   ` Xiao Guangrong
@ 2010-04-01  9:12     ` Avi Kivity
  0 siblings, 0 replies; 4+ messages in thread
From: Avi Kivity @ 2010-04-01  9:12 UTC (permalink / raw)
  To: Xiao Guangrong; +Cc: Ingo Molnar, Marcelo Tosatti, Sheng Yang, KVM list, LKML

On 04/01/2010 12:05 PM, Xiao Guangrong wrote:
>
>> We've considered this in the past, it makes sense.  The big question is
>> whether any guests actually map the same page table through PDEs with
>> different permissions (mapping the same page table through multiple PDEs
>> is very common, but always with the same permissions).  Do you know of
>> any such guest?
>>      
> I also don't know whether have such guest.
> Maybe my idea is no good for current OS, thanks for your comments.
>    

In fact there are plans to make kvm such a guest (when running in nested 
mode) - when we perform live migration we write-protect all guest pages, 
and it's reasonable to use the top-level shadow page to write protect 
all memory at once instead of iterating over all mmu pages.  When that 
goes in, we should also implement your idea.

-- 
error compiling committee.c: too many arguments to function


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2010-04-01 16:45 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-03-30  1:59 [RFC] KVM MMU: thinking of shadow page cache Xiao Guangrong
2010-03-30 13:32 ` Avi Kivity
2010-04-01  9:05   ` Xiao Guangrong
2010-04-01  9:12     ` Avi Kivity

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox