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Message-ID: <4BC57478.3080902@lumino.de>
Date: Wed, 14 Apr 2010 09:53:28 +0200
From: Michael Schnell <mschnell@lumino.de>
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CC: microblaze-uclinux@itee.uq.edu.au, LKML <linux-kernel@vger.kernel.org>,
       John Williams <john.williams@petalogix.com>,
       John Linn <John.Linn@xilinx.com>,
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       Goran Bilski <goran@xilinx.com>,
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       Linus Torvalds <torvalds@linux-foundation.org>,
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       stephenn@xilinx.com, Karen Whelan <karen.whelan@petalogix.com>,
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Subject: Re: Microblaze - The fist year
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On 04/13/2010 03:27 PM, Michal Simek wrote:
>
> yes, futex is there. You can check it in
> arch/microblaze/include/asm/futex.h
Great ! I'll check how this is done.
>
>> Does Microblaze MMU Linux support SMP ?
>
> It is possible to connect several MicroBlazes but the problem is
> missing cache coherency modul. I hope that Xilinx will release any
> version which will support it.
> We haven't done any significant work to support it but it is expected
> solution which will happen.

Besides cache coherency, another problem might be doing FUTEX. here (I
suppose) SMP safe atomic user space operations are necessary. many
simple RISK (load/store-) CPUs don't provide these (new ARMs provide
"load-locked / store-conditional" on that behalf as an extension to the
load/store paradigm. I suppose these can be done in an SMP-safe way,
supposedly using the hardware that provides cache coherency).

-Michael