From: "H. Peter Anvin" <hpa@zytor.com>
To: Borislav Petkov <bp@amd64.org>
Cc: mingo@elte.hu, tglx@linutronix.de, x86@kernel.org,
linux-kernel@vger.kernel.org, Frank Arnold <frank.arnold@amd.com>
Subject: Re: [PATCH -v2 0/5] AMD L3 cache index disable fixes for .35
Date: Fri, 23 Apr 2010 11:06:15 -0700 [thread overview]
Message-ID: <4BD1E197.6000508@zytor.com> (raw)
In-Reply-To: <20100423140927.GA13750@aftab>
On 04/23/2010 07:09 AM, Borislav Petkov wrote:
>
> Ok, looking at the k8.o object it is 507 bytes so I don't think
> compiling it in would hurt embedded people too much:
>
> text data bss dec hex filename
> 379 104 24 507 1fb arch/x86/kernel/k8.o
>
> So how about the following? It should apply cleanly on top and it
> survived a bunch of randconfigs here so far.
>
I have to say I think that's pretty ridiculous for someone who cares so
much about size that they have disabled CONFIG_PCI that they can just
add another half-kilobyte of code that is going to do absolutely
nothing. Think about the kind of x86 CPUs that could even consider
disabling CONFIG_PCI -- we're talking pretty deep embedded by now.
So, no, I don't think this is an option. Force-enabling CONFIG_PCI on
x86 would be a more realistic option, and I honestly don't know how many
people would object to that, but not right now.
The obvious answer instead is to augment the list of stubs in
<asm/k8.h>. In particular, move num_k8_northbridges into the #ifdef and
just #define num_k8_northbridges 0 in the other clause.
-hpa
next prev parent reply other threads:[~2010-04-23 18:06 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-22 14:06 [PATCH -v2 0/5] AMD L3 cache index disable fixes for .35 Borislav Petkov
2010-04-22 14:06 ` [PATCH 1/5] x86, cacheinfo: Unify AMD L3 cache index disable checking Borislav Petkov
2010-05-03 22:39 ` [tip:x86/cpu] " tip-bot for Borislav Petkov
2010-04-22 14:06 ` [PATCH 2/5] x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments Borislav Petkov
2010-05-03 22:39 ` [tip:x86/cpu] " tip-bot for Frank Arnold
2010-05-14 18:48 ` [tip:x86/urgent] " tip-bot for Frank Arnold
2010-05-14 19:01 ` tip-bot for Frank Arnold
2010-05-15 19:29 ` [PATCH 2/5] " Jaswinder Singh Rajput
2010-05-17 19:05 ` Jaswinder Singh Rajput
2010-04-22 14:07 ` [PATCH 3/5] x86, cacheinfo: Reorganize AMD L3 cache structure Borislav Petkov
2010-05-03 22:40 ` [tip:x86/cpu] " tip-bot for Borislav Petkov
2010-04-22 14:07 ` [PATCH 4/5] x86, cacheinfo: Make L3 cache info per node Borislav Petkov
2010-05-03 22:40 ` [tip:x86/cpu] " tip-bot for Borislav Petkov
2010-04-22 14:07 ` [PATCH 5/5] x86, cacheinfo: Disable index in all four subcaches Borislav Petkov
2010-05-03 22:40 ` [tip:x86/cpu] " tip-bot for Borislav Petkov
2010-04-23 0:23 ` [PATCH -v2 0/5] AMD L3 cache index disable fixes for .35 H. Peter Anvin
2010-04-23 6:50 ` Borislav Petkov
2010-04-23 14:09 ` Borislav Petkov
2010-04-23 18:06 ` H. Peter Anvin [this message]
2010-04-24 8:21 ` Borislav Petkov
2010-05-03 18:20 ` Borislav Petkov
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